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Which register I check ethernet CRC error flag ?

Other Parts Discussed in Thread: TMS570LS3137

I using "TMS570LS3137" and I'm reading "Safety Manual(SPNU511D)","Technical Reference Manual(SPNU499B)"

I implement "ETH10:CRC in Message".


I'm refer to Technical Reference Manual,but I don't know where CRC error flag is set.
Which register I check ethernet CRC error occur ?

I think maybe RXCRCERRORS register(Technical Reference Manual (page1597)).

If so I don't know how to indicated errors. What value ?

Best Regards.

  • Hi Arriy,
    The RXCRCERRORS is a statistics registers meaning it records the number of times a CRC error is detected. Please also check the CRC Error (CRCERROR) Flag in section 29.2.6.5.20.
  • Hi Charles.

    Thank you your answer.

    I can implement safety mechanism of "ETH10:CRC in Message".

    Best Regards.

  • Hi Charles.

    Thanks to your advice,I understood the registers to check.
    But I don't know how to check the register.

    CRC Error (CRCERROR) Flag is in receive ethernet data ?
    Please suggest a nice way to check CRC Error flag.

    Best Regards.
  • Hello Arriy,

    The EMAC can be configured so that an interrupt occurs on statistics register updates. The RXCRCERRORS is one of these statistics registers that increments on each detected packet with a CRC error. Once a CRC error is detected, what you do with the notification is up to the application. For certain, you could read the packet buffer and determine which packet had a CRC error. The exact handling of the faulty packet at that time, is up to the specific Ethernet based protocol you are using. i.e., throw it away and ask for re-transmission, try to validate the data frame independently, etc.
  • Hello, Chuck.

    Thank you for your reply.
    I understand "RXCRCERRORS" flag is error count register.

    I want to implement a function to periodically monitor Ethernet message CRC error(safety mechanism is ETH10:CRC in Message).
    But, actually I am not familiar with Ethernet....

    How to implements this mechanism ?
    If you do not mind, I'm happy if you give me the source code.

    Best Regards
  • Hello Arriy,

    RXCRCERRORS is the register where the CRC errors are recorder/counted. There is an interrupt associated with all of the various status registers that can be enabled (VIM channel 76 - C0_MISC_PULSE) to notify you to go review the registers to look for an increase in the CRC error count or some other status update of interest. If your software identifies the change in the RXCRCERRORS register this is the intented part of the ETH10 safety mechanism where the microcontroller has identified the fault and notified of the fault. What you do with the fault notification, is application dependent and is up to you to decide if you need to go deeper into the message and retrieve the in message CRC ERROR flag. If you do need to do so, you would need to read the data from the message buffer and specifically access the flag location.

    We do have an LWIP demo package that is available, but I do not know what levels of error checking are implemented. For sure, the demo does not comprehend functional safety considerations.
  • Hi Chuck.

    Thank you for your answer.

    As you say, if receive message has CRC errors, RXCRCERRORS is not 0.

    Because, I decided check with RXCRCERRORS to CRC error check.

    Best Regards.