This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LC4357: VCCAD sequecning

Part Number: TMS570LC4357

Hello,

In the datasheet we state that the Hercules devices have no timing dependency between the ramp of the VCCIO and the VCC supply voltage, but what about VCCAD?

Is it ok to release nPORRST before VCCAD is stable?

Is the internal reset (PENA) to the ADC core(s) enough to ensure that they will power up correctly? I mean realise PENA after the VCCAD has become stable.

Thanks,
Christian

  • Hi Christian,
    Not only PENA needs to be released by also the RESET bit in the ADRSTCR needs to be set high to release the ADC module from reset. Once reset is released the ADC_EN needs to be set before any conversion can start. Who will be supplying the VCCAD? Can you check if VCCAD will be stable by this time?
  • Hi Charles,

    Thanks for the fast reply and the hint that PENA isn't enough to release the reset.
    The idea is that the ADC is supplied with 5V and the regulator needs some more time to stabilize, the PGOOD signal or a VMON could be used to signal to a SW routine that VCCAD has reached its voltage level.

    The question really comes down to, do we need to wait releasing nPORRST till VCCAD is stable or not?
    And will the ADC be fully functional if we hadn't waited for VCCAD, but for sure waited in SW for VCCAD to stabilize?

    Thanks,
    Christian
  • Hi Christian,
    The accuracy of the ADC measurements depend on a clean VCCAD. You would not want to start any conversion without waiting for a clean VCCAD. If this means that the nPORRST needs to be extended then it can be done out of the chip by gating the PGOOD with the nPORRST. Or as you suggested, take the PGOOD as a digital input to the chip and poll the input until the VCCAD is stabilized.