TM4C1290NCPDT: RTCCLK output not functioning...

Marc Warden

Part Number: TM4C1290NCPDT
Other Parts Discussed in Thread: EK-TM4C1294XL

Dear Support,

With the TM4C1290NCPDT I am having a problem getting RTCCLK signal out the RTCCLK (PC5) pin. For "problem" read I am unsuccessful. I am using Code Composer Studio version 6.2.0.00050 with the TivaWare C Series 2.1.1.71 library.

Below is the code I use in an attempt to configure the PC5 to work as RTCCLK:

(Not shown is the code to enable/configure the Hibernate peripheral and get the RTC running. And I have added code to confirm the RTC seconds register is incrementing every second.)

   // enable GPIOC
   // (we have some pins to set up/configure)
   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);

   // now wait for it to enable...
   while ( false == SysCtlPeripheralReady ( SYSCTL_PERIPH_GPIOC ) ) ;

    // RTCCLK is an alternate function
    GPIOPinConfigure(GPIO_PC5_RTCCLK) ;

    // just like DIVSCLK do this 2nd
    GPIOPadConfigSet(GPIO_PORTC_BASE, GPIO_PIN_5, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD ) ;

    // we have to do the following for both RTCCLK and DIVCLK
    // because the Tiva library does not offer
    // a function to complete the set up to have the pin configured for use by the hardware/peripheral
    // now configure the pin to be HW controlled!
    // note this function writes the GPIO_O_AFSEL
    // register with the Pin # to complete the transition to the alternate function!
    GPIODirModeSet(GPIO_PORTC_BASE, GPIO_PIN_5, GPIO_DIR_MODE_HW) ;

Let me add here that with the arguments appropriate to configure PQ4 to operate as DIVSCLK to emit the PIOSC clock the above same steps work just fine. I am getting the 16MHz PIOSC (albeit divided by 64 which is what I select via another register) out the DIVSCLK pin.

RTCCLK is only configured to emit the RTC clock signal during initial manufacturing test. The RTCCLK pin is just routed to a test pad almost directly under the pin so there's not much that can be wrong with it but I have confirmed it is not shorted to any other pin. Oh, I have noticed this behavior on two different hardware revisions of boards.

It is pretty important this work as we want to confirm the 32.768KHz clock is very accurate -- to within a few PPM. We use the RTC for critical timing of a MESH radio network. We also use the RTC to perform a calibration of the PIOSC to get the PIOSC to better than 1% accuracy.

Sincerely,

Marc Warden
Senior Firmware Engineer
Davis Instruments

over 8 years ago

0 Amit Ashara over 8 years ago

TI__Guru**** 244400 points

Hello Marc

To be able to output the RTCCLK, the hibernate module needs to be started and configured. I do not see any code for the same.

0 Marc Warden over 8 years ago in reply to Amit Ashara

Intellectual 380 points

Hi Amit.

As I noted in my post I did not provide the code which enables/configures the Hibernate peripheral but I can assure you the Hibernate peripheral and its RTC are running and I confirmed the RTC seconds register is being incremented every second. If you need to see the code that enables/configures the Hibernate peripheral just ask and I'll collect it and post it.

Marc.

0 Amit Ashara over 8 years ago in reply to Marc Warden

TI__Guru**** 244400 points

Hello Marc

What I want to check is if the HIBCC register bit for SYSCLKEN that allows RTCOSC clock to be sourced to the system is set or not.

0 Marc Warden over 8 years ago in reply to Amit Ashara

Intellectual 380 points

Amit,

Here is the Hibernate peripheral configuration source code lines:

SysCtlPeripheralPowerOn(SYSCTL_PERIPH_HIBERNATE);
SysCtlPeripheralEnable(SYSCTL_PERIPH_HIBERNATE);
while(!(SysCtlPeripheralReady(SYSCTL_PERIPH_HIBERNATE)));

/* Configure the clock for the hibernation module */
HibernateEnableExpClk(16000000);

/* Turn on the RTC */
HibernateRTCEnable();

/* Set up the peripheral */
HibernateClockConfig(HIBERNATE_OSC_LOWDRIVE);

HibernateCounterMode(HIBERNATE_COUNTER_RTC);

HibernateRTCSet(0);

HibernateRTCTrimSet(0x7FFF);

I do not have source code to the Hibernate library code of the library used by Code Composer Studio but in the release firmware library source (TM4C_HIBERNATE.C) that SYSCLKEN gets set -- in a call to HibernateClockConfig() -- in the HIBCC register is controlled by a #define:

#define HIBERNATE_CLOCK_OUTPUT CLASS_IS_TM4C129

and the lines of code from the TM4C_HIBERNATE.C library source file is:

if(HIBERNATE_CLOCK_OUTPUT)
{
HWREG(HIB_CC) = ui32Config & (HIBERNATE_OUT_SYSCLK |
HIBERNATE_OUT_ALT1CLK);
}

Marc.

0 Amit Ashara over 8 years ago in reply to Marc Warden

TI__Guru**** 244400 points

Hello Marc,

Thanks for the information. I believe what you are using is a TI RTOS example perhaps since TivaWare file is named as hibernate.c

I can check it up on a LaunchPad and see what the issue could be.

0 Marc Warden over 8 years ago in reply to Amit Ashara

Intellectual 380 points

TI RTOS example? I don't think so.

My info on how the release firmware or test (Baremetal) firmware came into being is very sketchy. I was deeply involved with another project (based on one each STM32F103xx and STM32F105xx ARM processor) when this TM4C1290 based project started and then joined the project about 6 months later. The "release" firmware I spoke of is built using some open source non-IDE development system of sorts. To build the release firmware one has to run "make" in a Cygwin session running in Windows 7. This firmware does make use of an embedded OS, Contiki.

The test or Baremetal firmware was initially roughed in -- by another developer -- using the free Code Composer Studio. I do not know what this developer started with. I do know the test firmware does not use any RTOS. It is "baremetal" code with really nothing between the firmware and hardware in order to allow a PC based test program (which I am also working on) to interact with the firmware/hardware in a very intimate way to support low level testing the hardware it comes off the manufacturing line.

I inherited the Baremetal code and added some better I/O functionality -- for example a printf() function to first format then emit stuff directly out the debug Comm port -- and then added lots of extra functionality to support manufacturing test requirements.

Marc.

0 Amit Ashara over 8 years ago in reply to Marc Warden

TI__Guru**** 244400 points

Hello Marc

I wrote a simple code for the EK-TM4C1294XL with TivaWare 2.1.3.156
int
main()
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
SysCtlPeripheralEnable(SYSCTL_PERIPH_HIBERNATE);

GPIOPinConfigure(GPIO_PC5_RTCCLK);
GPIOPinTypeHibernateRTCCLK(GPIO_PORTC_BASE, GPIO_PIN_5);

HibernateEnableExpClk(16000000);
HibernateRTCSet(0);
HibernateRTCEnable();

HWREG(HIB_CC) = HIB_CC_SYSCLKEN;

while(1);
}

And I can see on the Scope that PC5 toggles as expected. So I took the code that you had and added

HWREG(HIB_CC) = HIB_CC_SYSCLKEN;

And it still works as expected.

0 Marc Warden over 8 years ago in reply to Amit Ashara

Intellectual 380 points

The library source I have for the release firmware project in the code HibernateClockConfig() has a line that sets the HIB_CC_SYSCLKEN bit but the library for the Baremetal project may be different. (I do not have source for the library used by Code Composer Studio.)

Let me print out the contents of the HIB_CC register to see what the bit is set to.

If the SYSCLKEN bit is not set I'll set it.

Marc.

0 Marc Warden over 8 years ago in reply to Amit Ashara

Intellectual 380 points

Ok, I "dumped" the HIB_CC register and the bit was *not* set. I set the bit and RTCCLK now appears at the test pad.

In hindsight after going step by step through the GPIO configuration for the RTCCLK pin I should have done a thorough analysis of the Hibernate peripheral configuration as well.

Thanks for your help, Amit.

Marc.

0 Amit Ashara over 8 years ago in reply to Marc Warden

TI__Guru**** 244400 points

Hello Marc

Not a problem. Glad that you were patient to hold off for a day for me.

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TM4C1290NCPDT: RTCCLK output not functioning...