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TMS570LS3137: RST5 Shadow Registers

user4777395
Intellectual 480 points
Part Number: TMS570LS3137


"The use of a two stage cold and warm reset scheme on the device possible the implementation of shadow
Registers. "
What is the function of two stage cold and warm reset scheme?

  • 0
    TI__Guru 59540 points
    The device supports two types of resets.
    A cold reset (also referred to as a power on or hard reset via nPORRST pin) resets the entire device and all registers within the device. Even if power isn't removed all registers, RAM, CPU operating state is like coming out or power down and everything starts new. This could be utilized in catastrophic safety cases where it is deemed necessary to restart the entire application. Given the ability to test for latent faults on startup, it also allows the ability to detect and safe the system if a critical latent fault is determined.

    A warm reset (also referred to as a soft reset, via nRST or software reset) resets on key parts of the device but software execution starts from the reset vector as one would expect. Certain registers such as the shadow registers maintain their content during a soft reset so causes of the reset can be determined (i.e., check for uncorrectable errors, check for ESM status flags, etc). This way, a soft reset can be used in many cases to correct errors in SW execution due to transient errors affecting the program flow, or transients in data affecting program flow, etc. Other scenarios may also exist that require a warm/soft reset to correct. These need to be discussed on a case by case basis.

    A combination of the two types of resets may be used to diagnose and protect against transient and permanent failures. For example, if a CPU fault is found, it could be transient and a soft reset could be used to reset and start the CPU again. If it happens repeatedly (number of instances is up to the application requirement), a cold/hard reset could be applied and if, the fault is present, go to a safe state and notify the system manager in some way.
  • 0 in reply to Chuck Davenport
    Intellectual 480 points
    Thank you
    I understood the difference in reset.

    Specifically, which register is targeted for RST 5 Shadow Registers of RST5?
    In "TMS 570 LS 31 x / 21 x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual", only "ESMSSR2" could be found.
  • 0 in reply to user4777395
    TI__Guru 59540 points
    Yes, the ESM shadow register is one such register. However, this mechanism is really considering any registers that are preserved through a warm reset. The ESM is the primary place to start as it will lead to reading others such as uncorrectable error registers within the RAM or Flash wrappers. Additionally, you would want to check the SYSESR register to determine the cause of the reset since this is the only way you would know that the reset was caused by nRST or an internal WD or even if it were a hard reset due to nPORRST assertion.

    We do not have a comprehensive list of the registers that could be preserved through reset (although they are indicated int he TRM) and rely on the developers to determine which registers are needed based on the modules that they are using within their application. You may also reference how this is handled within the SafeTI Diagnostic library which implement many of the diagnostic measures identified within the Safety Manual.