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TM4C129XKCZAD: Poor Flash programming performance with interrupts - Flash clocking

R Sexton
Expert 1030 points

Part Number: TM4C129XKCZAD

I'm using the flash mirror mode for failure recovery.   I've written an interrupt-based routine to update the mirror area in the background,  and the interrupt-based code is far, far slower than non-interrupt based code.

Non-Irq code (Tivaware routines): ~8s.  Interrupt code: ~200s 

The flash update route is a state machine attached to the Flash interrupt.    It does an erase, bufferered write cycle.    While it runs, the CPU utilization is about 2%.

If I remove the WFI from my idle loop, I get good performance.    Something is going on with the clocking of the Flash controller during sleep.

I don't see any bits to control that.  Are there any?

  • 0
    Expert 1030 points
    One brief follow-up. I've set the SCGCEEPROM bit to clock the EEPROM during sleep, but I can't find any comparable bit for the Flash controller.
  • 0
    TI__Guru**** 244440 points
    Hello Robert

    What is the configuration of the Sleep Mode parameters for the micro?
  • 0 in reply to Amit Ashara
    Expert 1030 points
    Hmm. Theres a lot of them! Can you be more specific?

    I think these are the ones that you're wondering about.

    SYSCTRL, offset 0xD10 = 0 (No deep sleep)
    RSCLKCFG, offset 0x0B0 = 0x3300 0001

    Maybe I can fix this by turning off Auto-Clock gating during flash programming.
  • 0 in reply to R Sexton
    Expert 1030 points
    Fixed. I turned off the ACG bit in RSCLKCFG.

    This one sounds like an errata - some sort of clock is getting gated, but there's no control bit for it.
  • 0 in reply to R Sexton
    Expert 1030 points
    Well, it sorta works -

    I disable ACG with SysCtlPeripheralClockGating(false), and switch it back on with SysCtlPeripheralClockGating(true).

    The re-enable doesn't seem to work. I have a clock-gated timer that I use to measure activity. Usage never goes back down afterwards.
  • 0 in reply to R Sexton
    TI__Guru**** 244440 points
    Hello Robert

    When using the Auto Clock Gating make sure that the peripherals that are required to be active (e.g. timer) have the SCGC bit set to 1. The Flash is active in Sleep Mode. The Flash can however be affected by the SLPPWRCFG register setting of FLASHPM. What is the setting for the same?
  • 0 in reply to Amit Ashara
    Expert 1030 points

    Hello Amit,  thanks for the clues.

    I've got many, many peripherals enabled during sleep.   Probably more than I require, especially GPIOs.  

    I was unaware of the SLPPWRCFG register.   I don't use it.  On my board its at it's default value of zero.

  • 0 in reply to R Sexton
    TI__Guru**** 244440 points
    Hello Robert

    With SLPPWRCFG register set to 0, the flash shall remain in an active state. The only thing I can think of is the clock the flash controller may be getting gated after the flash operation is getting over and before the interrupt is being asserted. As per the data sheet "All Flash operations are completed before entering sleep or deep sleep". So if the CPU starts a flash operation and goes to WFI only to be woken up by an interrupt, then it may not be the interrupt from the flash controller but some other interrupt source on the device.