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TMS570LS3137: EMIF Address Line Not Toggling

Mihir Karkhane
Prodigy 70 points
Part Number: TMS570LS3137


Hi,

I am working on TMS570 LS3137 LZWT. I have a SDRAM(CS0#), NOR Flash(CS2#), FPGA(CS4#) and an NVSRAM(CS3#) connected on my EMIF bus. When I am trying to read/write/erase on the SDRAM/NOR Flash or try to access FPGA, it is working OK.

When I try to access the NVSRAM, One of the Address Line (Address Line 4) doesn't toggle. I have confirmed this by probing the line and sending read/write command to the NVSRAM from my code. When I send the same command to SDRAM, the line toggles. The same has been observed on an oscilloscope. Due to this address line not toggling, I am unable to read/write properly to the NVSRAM.

I have narrowed down to Address Line 4 because my written data repeats after every 16 bytes. My NVSRAM is CY14B108N-BA45XI.

What can be the issue?

Thanks in Advance.

  • 0
    TI__Guru 68930 points

    So first, if you look at SPNU499 Figure 17-8 "EMIF to 8-bit / 16-bit Memory Interface" you'll notice that

    the low order addresses of the memory should be driven by EMIF_BA[1:0] depending on whether the width is 8 or 16 bits.


    So this means that EMIF_ADDR[0] signifies a 32-bit address change,  or 4 bytes.

    EMIF_ADDR[1] is an 8 byte change,  and EMIF_ADDR[2] is a 16-byte change.



    So if you just say you see the memory repeating every 16 bytes,  this would be a problem on EMIF_ADDR[2] not EMIF_ADDR[4].

    If you are observing A[4] on the cypress chip that's ok but it should be driven by EMIF_ADDR[2].


    And if you are observing A[4] on the cypress chip it is possible that you have a PCB problem or an assembly problem where that pin is not actually connected

    to EMIF_ADDR[2] of the MCU.    But the same pin might be connected to the other memories / FPGA so you might see it toggling if you look at those other memories.

    You also need to look at the pin with an oscilloscope and look for any subtle signs of a short circuit ... say if the voltage level isn't quite right when accessing this memory.    Maybe it is shorted to a data line or a chip select..  if there is a short and a drive conflict usually you will see a small voltage shift, maybe only 10's of mV but some 'step' as this line tries to toggle.  If you see anything like that on the scope - look for a short circuit.


    Also be aware that if you look at the address line with some test loop on an SDRAM the addresses pins show one address bit during RAS\ and a differrent address during CAS\  so that might explain toggling when accessing SDRAM but not toggling when accessing ASYNC.   However it would mean that you have some software issue with the test case too...   And so I think it's more likely an assembly or manufacturing issue on your board.

  • 0 in reply to Anthony F. Seely
    Prodigy 70 points
    Hi,

    Thank you for your reply.
    NVRAM data width is 16 bits. The address line connections of NVRAM are as below

    NVRAM ADDR[0] == EMIF_BA[1]
    NVRAM ADDR[1] == EMIF_ADDR[0]
    NVRAM ADDR[2] == EMIF_ADDR[1]
    NVRAM ADDR[3] == EMIF_ADDR[2]

    Address line 4 refers to EMIF_ADDR[2]. When I try to write 32 bytes to NVRAM starting from address 0 (to address 15), this line is not toggling. When I write to SDRAM the same operation, I can see the toggling.

    When I probed on oscilloscope, I don't see any shift in the logic level on that line.
  • 0 in reply to Mihir Karkhane
    TI__Guru 68930 points
    Thanks for clarifying the mapping.

    If you don't see oddly shifted levels then shorts / opens is likely not the problem especially if SDRAM works.

    You do see the chip select, oe\, we\ and the other address lines (lower order) toggling then the only explanation I can think of is a code bug.

    Have you tried stepping through your code to watch what addresses are written to ?
    So for example on each 'STR' instruction that writes to the SRAM, make sure the value in the register that is used to address into the NVRAM is correct...