• State
  • Locked Locked
  • Replies 6 replies
  • Subscribers 30 subscribers
  • Views 850 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TM4C1290NCPDT: Erasing/resetting OTP memory

Marc Warden
Intellectual 380 points
Part Number: TM4C1290NCPDT
Other Parts Discussed in Thread: SEGGER

I need to erase the OTP memory on some devices I'm using to do some manufacturing test code development. I have read the instructions in the JTAG section of the microprocessor data sheet. My test setup does not provide for the level of control to do this via low level manipulation of the GPIO pins/reset/power lines. Nor am I in a position to take the time to write code to perhaps communicate with a JFLASH/Segger module to (possibly) perform this action. Doesn't TI offer some software tool that can use the JFLASH/Segger module to perform an OTP memory erase?

  • 0
    TI__Guru**** 244380 points
    Hello Marc

    Which OTP memory are you referring to?
  • 0 in reply to Amit Ashara
    Intellectual 380 points
    USER_REG0 through USER_REG3 locations.
  • 0 in reply to Marc Warden
    TI__Guru**** 244380 points
    Hello Marc,

    Erasing the commit registers requires the user to run the unlock sequence. The JTAG application note covers the tested debug probes and software that allow for the unlock sequence.

    www.ti.com/.../spma075.pdf
  • 0 in reply to Amit Ashara
    Intellectual 380 points
    Didn't have the 3.4 version, just the 3.3 version. Tried to get 3.4 and got directed to 4.1 which I obtained. But it doesn't have a dbgjflash.exe tool. Managed to get the 3.4 version downloaded and installed. Tried the command line and it looks like it wants to work but I have no way currently to manually control the reset line.

    I will have to talk to a HW Eng. and see if something can be rigged up.

    Marc.
  • 0 in reply to Marc Warden
    TI__Guru**** 244380 points
    Hello Marc

    The unlock sequence requires the Reset to be low when the device is powered up. So if the hardware units controls power and reset then a mechanism is required in software to perform the same, else the line must be controlled manually.
  • 0 in reply to Amit Ashara
    Intellectual 380 points
    Hi Amit.

    I am back on this task and have a board with a button I can control the hardware reset line. The command you pointed me to does erase the TM4C1290 FLASH memory but leaves the contents of the OTP memory untouched.

    I was under the impression the dbgjtag.exe command for the XDS100V2 module would also erase/reset OTP memory. Is there another command to use? Or possibly a newer dbgjtag.exe?

    Marc.

    Marc.