This question came up during a code review of code written several years ago.
Most of our development team is familiar to a watchdog, when starved, simply resetting the controller. Usually a bit in a register is set to indicate a WDOG reset.
TM4C controllers are the first I have used that can be used as timers, etc..
One behavior I programmed to is that if you are using a WDOG as a WDOG, when you first enable the WDOG peripheral, you end up in the WDOG ISR.
So I ended up with code that reads like:
BOOL waitingForFirstWDOG_Hit = TRUE;
void WDOG_Init(void) {
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_WDOG0);
if(ROM_WatchdogLockState(WATCHDOG0_BASE) == true)
{
ROM_WatchdogUnlock(WATCHDOG0_BASE);
}
ROM_WatchdogStallEnable(WATCHDOG0_BASE);
ROM_WatchdogIntClear(WATCHDOG0_BASE);
ROM_WatchdogReloadSet(WATCHDOG0_BASE, SysCtlClockGet()/10);
ROM_IntEnable (INT_WATCHDOG); // This will generate an immediate interrupt, so first ISR call needs to IntClear
ROM_WatchdogEnable(WATCHDOG0_BASE);
}
static void Watchdog_timer_ISR(void) {
if (waitingForFirstWDOG_Hit) {
ROM_WatchdogIntClear(WATCHDOG0_BASE);
waitingForFirstWDOG_Hit = FALSE;
}
else {
numAbnormalResets++;
EEPROM_Write16(ADDR_numAbnormalResets, numAbnormalResets);
// TODO: Watchdog_timer_ISR write fault
ROM_SysCtlReset();
}
}
(Apologies for code paste. It is not working for me today.)
It works. The question is, why do you end up in the WDOG upon enabling the WDOG? I am pretty sure the code is from an example. I tried to avoid the first interrupt, but did not find a way.
