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TM4C1294NCPDT: GPIO internal block diagram

Part Number: TM4C1294NCPDT

Hi

Use one GPIO of TM4C1294 to control RST pin of a external chip. Set GPIO as output and internal pull up. After pull down and release GPIO, the external chip will generate a software reset, then RST keep at 2.3V level. Could you share us internal GPIO block diagram? Thanks.

  • Hi Daniel,
    Is there a reason why you don't configure the TM4C GPIO in open-drain mode if your external chip reset is a bi-di?
  • There are some block diagrams of the GPIO in the datasheet, but I don't think that will help you. Did you configure the GPIO pin as open-drain? If not, when the external device does its software reset it appears that it will try to pull the NRST pin low. Unless the GPIO is configured as an input, or as open drain, you will have a drive conflict. Depending on the relative strength of the external device NRST pin and the GPIO pin, you will get some intermediate level like the 2.3 V you show in the diagram above.