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RM48L952: GIO Loopback test

Bob Bacon
Genius 10815 points
Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Hello
One of my customers is asking about GIO Loopback testing :-

In the Safety Manual TI supplied for the RM48L952, there is a safety mechanism listed –

 

SW test of function using I/O checking 

 

This is performed at power up and during normal operation. I can’t see a mechanism to perform a loopback internally.

 

Am I correct in thinking that this is a requirement shared with the circuitry around the microcontroller ? ie the external circuitry provides loopback of outputs to inputs and the inputs are stimulated by the external circuitry to make sure they are operable. ( This has been implemented)

 

Or is there a mechanism I haven’t been able to identify…

I notice there are loopback test features in some of the modules like N2HET and SPI but what is the recommended procedure for testing GIO.

Regards

Bob Bacon

 

  • 0
    TI__Genius 10815 points

    Hello
    Another related question

    We are looking at the power on self test for the N2Het, and there seems to be a fairly straight forward loopback test that can be employed.

     

    But as murphy is on my side we have selected to use N2Het2 [16]. According to Halcogen the pin is paired with N2Het2 [17] which exists in halcogen – However in the data sheet for the device, it appears to be absent from the pinout.

     

    Does it  exist as an internal node that we can use to perform a loopback test on pin 16 ?  

     

    If not we will need to rethink the test strategy…

     

    Thanks
    Bob Bacon

  • 0 in reply to Bob Bacon
    TI__Guru 59540 points
    Bob,
    If you are speaking specifically about HET channels, there are loop back structures/capability built into the IP. There is no need to physically wire separate pins external to the device for this. The output and input buffers can be internally connected to loopback within the same channel.

    For the broader question of the safety mechanism, you quoted, it is very dependent on the on the pin function as to how you would do it. For most functional pins there is IP support for a loop back test as either a digital loop back or an analog loop back. Digitial loop back simply checks the logic whereas analog loop back also exercises the buffers (basically pin level).

    For dedicated GPIO it is more straight forward in that you simply set the pin direction as output, set it high/low then read back on the input side to make sure it's matching. For additional error checking, on GPIO, you can also test for shorts by setting a pin high, the adjacent pin low, then readback both. Since we use zero dominant structures, if both read low, then the pins are shorted. This could also be applied to signals on board that are next to each other.