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CCS/RM48L952: EMIF SDRAM initialization

deokhwan kim1
Prodigy 10 points
Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Tool/software: Code Composer Studio

Hello, 

In the HALCoGen 04.06.01,  generate code from HALCoGen. 

In SDRAM initialize function, the following statement is written in the function description. (emif_SDRAMInit() )

"As per the errata EMIF#5, EMIF SDRAM initialization must performed with EMIF clock below 40MHz."

But I can not find Errata EMIF # 5. 

I am using the EMIF clock at 55 MHz, and I want to know whether it should be used below 40Mhz, or what conditions are there?

  • 0
    TI__Guru 59540 points

    Hello Deokhwan,

    The EMIF#5 advisory is relatively new and has not been officially published in a new errata document revision as of yet. Revisions are in the works but I do not know when all issues will be resolved so it can be published. In the meantime, I've attached a snippet from the draft version of the errata document that explains EMIF#5 advisory. Note that the errata does not apply to the use of the EMIF <40MHz but only to the initialization of the EMIF at a speed <= 40MHz.

    2068.EMIF#5 Advisory Draft Version.pdf