TMS570LS3137: PBIST fault injection test to each RAM

Hello Arriy,

There is no mechanism to insert a real or simulated fault into the actual RAM banks in either SDRAM, or any of the peripheral RAMs such as CAN RAM, MibSPI RAM, HET RAM, ADC RAM, etc. Instead, we rely on a test of the PBIST engine itself by executing the PBIST on a ROM bank which will result in a failure for PBIST and thus testing the logic of the test engine itself and the error reporting path. Since the address range/selection of the bank to be tested is really just a variable in the test, there is no need to actually test each memory bank in this way in order to identify latent faults in the PBIST engine itself.