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TMS570LC4357: SPI Compatibility Mode with DMA

Part Number: TMS570LC4357

Hi there,

I want to use  SPI2 (not Mibspi) with DMA to read and write burst of data from/to sd card but DMA is not getting request from SPI2 (already configured SPIINT0 to get DMA request) and also it is not clear that which DMA channel no. and DMA request no. (not clear in datasheets) should be used with SPI2,  can someone tell me what might be the problem and how to configure DMA for standard SPI2 ?

  • Hello Dinesh,

    The DMA channel2 is used for SPI2 RX and DMA channel 3 for SPI2 TX. (Table 6-41, LC4357 datasheet).

    The SPI generates a request on the RX_DMA_REQ line each time the received data is copied to the SPIBUF, and generates a request on the TX_DMA_REQ line each time the TX data is copied to the TX shift register either from the TXBUF. 

    The DMA request enable bit (DMAREQEN) should be set to assert the requests to the DMA controller module. Enable TX and RX DMA in DMACTL register. 

    Regards,

    QJ

  • Hi QJ,
    Thanks for reply, As you said to Enable TX and RX DMA in DMACTL register but DMACTL register comes under MIBSPI so should i enable MIBSPI2 driver to access DMACTL register ? I have enabled DMA request bit (DMAREQEN) but still no DMA request not generated by spi2 and i have done all other configuration as said by you.
    thanks
  • Hi all ,
    Please somebody answer question....it would be great help
    thanks
  • Hello Dinesh,

    You should be able to utilize the user code section to write to the DMACTL registers to enable the DMA functionality within SPI compatibility mode.
  • Hi Dinesh,

    To use DMA in SPI compatible mode, please configure the SPI and DMA as follow:

    1. Enable DMA

    2. Enable DMA BTC and HBC interrupt for DMA channel0 which is used for receiving data

    3. Assign DMA request (SPI RX and SPI TX) to DMA channel 0 and DMA channel 1

    4. Configure DMA TX and RX control packages

    5. Set the DMA channels (DMA_CH0, and DMA_CH1) to trigger on HW request (DMA_HW)

    6. Enable SPI (24th bit of GCR1 register)

    7. Enable DMAREQ in SPI INT0 register

    Regards,

    QJ

    6.