Part Number: TM4C129ENCPDT
Hi all
GPIO's: PF 2 and PF 3 are configures as PWM outputs: M0PWM2 and M0PWM3 respectively..
The PWM outputs frequency is set to 48KHZ.
The PWM output frequency work well until a break point logic commands are activated by the SW
team worker when the CPU is connected to a Debugger via JTAG - The PWM frequency is stopped for the
time the logic commands activation.
I took a look at the data sheet and i noticed that the PF2 and PF3 pins are shred with TRD0 and TRCLK pins
which is part of the Trace port.
My questions are:
1. Does the break points commands that come via the JTAG port can affect the
PWM outputs and activate the pins as Trace pins?
2. If yes..What to do to prevent that interruption?
3. There isn't any information about the trace port pins,
I expect to see them at the TPIU module but I don't see them there.
How to control them?
Need to send more data about the connectivity to the CPU, List of registers,App notes and etc...
Best Regards,
Avi Ben-Maor
hey work well until a Debugger
is connected to the CPU via JTAG port and break point logic commands are activated,
then,The PWM outpputs
There are trace pins TRCLK,TRD0-TRCLK
