TM4C129ENCPDT: EMAC_INT_ABNORMAL_INT bit

Hi Amir,
EMAC_INT_ABNORMAL_INT is a summary interrupt comprising the logical OR of the masked state of various interrupt sources including EMAC_INT_RX_OVERFLOW, EMAC_INT_TX_UNDERFLOW and others. So to answer your question, yes, the EMAC_INT_ABNORMAL_INT (bit15 EMACDMARIS) should be set if EMAC_INT_TX_UNDERFLOW (bit5 of EMACDMARIS) is set.

Thank you but still not clear what I'm looking.
Assume I enabled ONLY EMAC_INT_TX_UNDERFLOW using EMACIntEnable(EMAC_INT_RECEIVE | EMAC_INT_TRANSMIT | EMAC_INT_TX_UNDERFLOW)
then, I sent something to EMAC and there was an error, let say for example EMAC_INT_TX_STOPPED

1. What will happen now?
2. Will I get interrupt?
3. If I get interrupt and ask EMACIntStatus(), will I get EMAC_INT_TRANSMIT | EMAC_INT_TX_STOPPED | EMAC_INT_ABNORMAL_INT

4. If I am pooling the EMAC (don't use interrupts) using EMACIntStatus(), will I still "get" all the error bits set if something is wrong?

 

Hi Amir,

The prototype for EMACIntStatus is:
uint32_t
EMACIntStatus(uint32_t ui32Base,
bool bMasked)

So it depends what you pass for bMasked, either true or false. If you pass true and if you only enable interrupt sources for EMAC_INT_RECEIVE | EMAC_INT_TRANSMIT | EMAC_INT_TX_UNDERFLOW then you will not return the status of EMAC_INT_TX_STOPPED. But if you pass false, then it will read the unmasked status which will include the EMAC_INT_TX_STOPPED and any bits that are set.

Thanks a lot!