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TM4C129ENCPDT: Howto simulate EMAC error

Amir-Yungman
Intellectual 410 points
Part Number: TM4C129ENCPDT

Hello,

1.       For logic testing purposes, How can I simulate EMAC_INT_BUS_ERROR?
Or any other error like EMAC_INT_TX_STOPPED, EMAC_INT_RX_STOPPED?

 

2.       When error occurs on a given TX descriptor, will the EMAC continue to the next descriptor?

 

3.       When error occurs on a given TX descriptor, will the EMAC reset that DES0_TX_CTRL_OWN?

 

  • 0
    TI__Guru 72500 points

    I am not the expert on EMAC, but I think you can generate the  EMAC_INT_BUS_ERROR by programming the DMA to read from, or write to non-existent memory. You will also get a DMA error. After the error the EMAC controller needs to be soft reset.  

    (My answer is being reviewed internally, but I wanted to get you something so you know we are working on your question.)

  • 0
    TI__Guru**** 244400 points
    Hello Amir,

    As Bob mentioned the EMAC_INT_BUS_ERROR can be generated by making the EMAC's DMA fetch to access a location which is not is the addressable space. Also as mentioned by Bob, a soft reset of the MAC and initialization of the stack is required.
  • 0 in reply to Amit Ashara
    Intellectual 410 points
    Great. Tx. I'll do.
    I though it is Ethernet bus error...shame on me.
  • 0 in reply to Amir-Yungman
    Guru 117855 points

    Indeed - you raised interesting test questions.    And vendor described (how) the, "EMAC_INT_BUS_ERROR" (can) be generated.
    Yet - your initial posting sought (similar) guidance regarding, "EMAC_INT_TX_STOPPED,  EMAC_INT_RX_STOPPED?     Are those (also) effectively covered via the method provided?

    And - questions 2 & 3 - that first post - might both be, "in process?"    As you (likely) know - the more focused/specific the test - the (better) the results.    (usually)

  • 0 in reply to cb1_mobile
    Intellectual 410 points
    Thanks cb1_mobile, I totally agree with you, specific and detailed tests yield robust product, which we all "love"....

    Amit,
    Would you be so kind and answer the other questions as well? here goes again:

    1. For logic testing purposes, How can I simulate EMAC_INT_TX_STOPPED, EMAC_INT_RX_STOPPED? Other errors?

    2. When error occurs on a given TX descriptor, will the EMAC continue to the next descriptor?

    3. When error occurs on a given TX descriptor, will the EMAC reset that DES0_TX_CTRL_OWN?