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TM4C1290NCPDT: 2XTM4C+SDRAM+FLASH

abdaoui khairi
Prodigy 30 points
Part Number: TM4C1290NCPDT

hello guys, in fact i'm designing a board with the TM4C, my question is that it is possible (software and hardware) to have two or more TM4C processors connected to the same EPI bus, so that we can have access to a single flash and SDRAM?   thank you 

  • 0
    TI__Guru 72500 points
    Yes it is possible. However, only one TM4C device can control the bus at a time. The other TM4C devices must configure the pins of the EPI bus as GPIO inputs.
  • 0 in reply to Bob Crosby
    Prodigy 30 points

    thank you very much for your feed back, what about the PCB layout point of view? i mean how can i terminate each line to adapt impedance..? 

  • 0 in reply to abdaoui khairi
    Guru 117855 points

    Depending upon bus speed & pcb layout restrictions - you may consider the use of,  "multiplex IC(s)" (or FPGA/CPLD) - commonly routed to the memory devices - and switchable then between (each) MCU.   This method eliminates the requirement to toggle (both) MCU's (many) dedicated pins - between EPI & GPIO (input) - thus provides (eased & faster), "switch-over."   (and may also reduce the memory's "bus trace length" (as the mux may be located adjacent to the memory) which reduces (or prevents) signal reflections.)

    As w/most engineering decisions - "trade-offs" are involved - both methods enjoy advantages...

  • 0 in reply to abdaoui khairi
    Guru 117855 points

    Thank you - as well.    Please give a 2nd read as I added a note, "Reduced signal reflections" enabled by the adjacent location of memory & mux.

    Yours is an "inspired" idea - having MCUs (share) a common memory resource saves cost while reducing board size.    You may want to carefully plot, then segregate, "memory access locations" - reserved for each MCU.