TMS470MF06607: TMS470Mfo6607 Sleep and Wake up Issue

Hello Padmaja,

There are two low power modes - doze and sleep on TMS470M device. In sleep mode, all clock sources (PLL, OSC, LPO, RTI, etc) should be disabled, the flash bank and flash bump should be put in sleep mode too, but the voltage regulator (VREG) must be put in LPM1 state. If you don't program the FBFALLBACk, FPAC1, FPAC2 , FBAC and CDDIS registers, the clock is still running, the device is not considered to be in sleep mode.

Since there are no internal clocks, an external event (GIO interrupt, or CAN message, or SCI message) is required to wake up from sleep mode. Did you enable the GIO interrupt? and choose the GIO interrupt as the wake-up interrupt source? After disabling the clock domain, SW needs to execute an ARM instruction (WFI) with an IDLE cycle which triggers the CPU clock to stop.

Regards,
QJ

Hello QJ Wang,

I have enabled the GI Interrupt to make the Microcontroller to Wake Up. It is Waking Up only when the debugger is connected to the ECU (i.e., after flashing the source code and still debugger is connected, but the debugger is stopped). If I reset the ECU or remove the debugger it is not Waking up.

 

Please help me in this.

 

Thamks and Regards,

Padmaja.I

Hello Sir,

When I am trying to Put TMS470Mf06607 microcontroller to sleep or Doze mode, Microcontroller is not waking up even if iam giving GIO Interrupts.

 

The procedure which I am following to pit to sleep is

 

1. Putting all the flash banks and pumps to sleep.

flashWREG->FBAC = ((flashWREG->FBAC & 0xFFFF00FF) | 0x00001000 );

 

flashWREG->FPAC2 = 0;

 

flashWREG->FBFALLBACK = 0;

 

flashWREG->FPAC1 = ( flashWREG->FPAC1 & 0xFFFFFFFE);

 

1. Disabling all the clock domains and sources

systemREG->GHVSRC = (SYS_LPO_HIGH << 24U)

                                           | (SYS_LPO_HIGH << 16U)

                                           |  SYS_LPO_HIGH;

 

/** - Setup RTICLK1 clock */

systemREG->RCLKSRC  = (1U << 8U)

                                            |  SYS_LPO_HIGH;

 

       /** - Setup asynchronous peripheral clock sources for AVCLK1 and AVCLK2 */

systemREG->VCLKASRC  = SYS_LPO_HIGH;

             

systemREG->CSDIS = 0xFF;

 

              /** - Wait for until clocks are locked */

              while ((systemREG->CSVSTAT & ((systemREG->CSDIS ^ 0xFF) & 0xFF)) != ((systemREG->CSDIS ^ 0xFF) & 0xFF));

              systemREG->CDDIS = 0xFF;

              temp_var = systemREG->CDDIS;

1. Volatge Regulator to LPM1 mode

systemREG->VRCTL = 0x0F;  //Possible swap of Vreg ctrl fields modified from original 0xf0

1. Executing asm(“WFI”) Instruction.

 

GIO Settings\

 

Note: We are using only 4^th and 6^th pin to generate interrupt

 

/*This Register to detect the interrupts on either rising or falling level*/   (When the device in low power mode interrupts are detected n level based rather than edge based – as per the technical reference manual)

 

gioREG->INTDET =  0        /* Bit 0 */

                      | (0 << 1)  /* Bit 1 */

                      | (0 << 2)  /* Bit 2 */

                      | (0 << 3)  /* Bit 3 */

                      | (0 << 4)  /* Bit 4 */

                      | (0 << 5)  /* Bit 5 */

                      | (0 << 6)  /* Bit 6 */

                      | (0 << 7); /* Bit 7 */

 

/*This Register to detect the interrupts on either rising level*/  

 

    /** - interrupt polarity */

    gioREG->POL =  0        /* Bit 0 */

                | (0 << 1)  /* Bit 1 */

                | (0 << 2)  /* Bit 2 */

                | (0 << 3)  /* Bit 3 */

                | (1 << 4)  /* Bit 4 */

                | (0 << 5)  /* Bit 5 */

                | (1 << 6)  /* Bit 6 */

                | (0 << 7); /* Bit 7 */

 

 

    /** - clear all pending interrupts */

    gioREG->FLG = 0xFF;

 

/*This Register to enable the interrupts for 4^th and 6^th pin*/  

 

    /** - enable interrupts */

    gioREG->INTENASET =  0        /* Bit 0 */

                      | (0 << 1)  /* Bit 1 */

                      | (0 << 2)  /* Bit 2 */

                      | (0 << 3)  /* Bit 3 */

                      | (1 << 4)  /* Bit 4 */

                      | (0 << 5)  /* Bit 5 */

                      | (1 << 6)  /* Bit 6 */

                      | (0 << 7); /* Bit 7 */

 

/*This Register to configure  the interrupts  as high level*/  

 

   /** - interrupt level */

    gioREG->LVLSET =  0        /* Bit 0 */

                   | (0 << 1)  /* Bit 1 */

                   | (0 << 2)  /* Bit 2 */

                   | (0 << 3)  /* Bit 3 */

                   | (1 << 4)  /* Bit 4 */

                   | (1 << 5)  /* Bit 5 */

                   | (1 << 6)  /* Bit 6 */

                   | (1 << 7); /* Bit 7 *

Plz help me in this issue