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CCS/TM4C123GH6PM: Is it possible to change the width of SSI clock pulse

Brian Savage
Intellectual 800 points

Part Number: TM4C123GH6PM

Tool/software: Code Composer Studio

I am working with an ADC that has an SPI interface.  The manufacturer has indicated that the SPI clock pulse is too long.  I have implemented the interface with the TivaWare driver library.  Is there any way to vary the width of the clock pulse without changing the clock frequency?

  • 0
    TI__Guru 72500 points
    The TM4C SSI (SPI), when used as a master, will always have a 50% duty cycle clock. You can change the SPI clock frequency independent of the system frequency by changing the clock pre-scale divisor in the SSICPSR register and the serial clock rate in the SSI control 0 register. I find it strange that an ADC would not work because the serial clock is too slow. What speed are you running the SSI clock at? Is this the Analog Devices AD4001? In that datasheet I see a minimum 9.8nS serial clock period, but I do not see a maximum specified.
  • 0 in reply to Bob Crosby
    Intellectual 800 points

    Bob, this is confusing me as well.  I am running the SPI clock at 1Mhz.  The ADI application's engineer asked me if I could shorten the pulse width of the clock without changing the frequency.  I have tried multiple frequencies with no success.  I'm not sure this is a good path to go down.

  • 0 in reply to Brian Savage
    TI__Guru 72500 points
    Brian,
    Have you looked at the SSI CLK with a scope? It should be close to symmetrical with 500nS high and 500nS low (less rise and fall time). It is important that there are no reflections (ringing) on the SSI CLK line.
  • 0 in reply to Bob Crosby
    Guru 117855 points

    (this is intended for poster Brian - not Bob...)

    I wonder if you may have "misheard or misunderstood" that ADI engineer? Just as vendor's Bob notes - I too have (rarely) encountered such a restriction placed upon a "destined for commercial use" ADC device. If possible - I'd suggest that you repeat your understanding of that engineer's instruction - but this time (in writing - assumes his past advice was verbal!) Cell phones are not famed for absolute clarity.

    And - I was not entirely convinced of any (lasting) success - presented in your other AD4001 post - believe I listed my concern...

    I believe the "appeal" of the SPI medium is the (usual) acceptance of the "clocked data" - with no such, overly harsh restriction - placed upon the SPI clock. If it were me - I'd ask the engineer to (properly) explain - why he believes - so tight a restriction is, "in order." At minimum - this is highly unusual...

    You reported that your firm has past used that AD4001 device w/success - cannot you probe one (better two) of those boards - and thus "positively confirm" (with that measured data) what "ADI" device timings & signal widths are (really) required?