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RM57L843: RM57L843

Geng Yue
Intellectual 535 points
Part Number: RM57L843

Hi everyone,

I am working on the MibSPI RAM parity/ecc test. According to TRM of RM57L843, "PTESTEN" bit in PAR_ECC_CTRL and "ECCDIAG_REG(3:0)" should be enabled. 

I am wondering what's the function of "ECCDIAG_REG(3:0)"?  What if I disable the ECCDIAG_REG(3:0)?

 

  • 0
    TI__Guru 59540 points
    Hello Yue,

    I believe this should be ECCDIAG_EN(3:0) which is in the ECCDIAG_CTRL register. It enables or dsiables the diagnostic mode for testing the ECC logic. It should be disabled during runtime and enabled when testing or in diagnostic mode. The confusion is the inconsistency in naming. I will submit a document feedback notice to insure this get corrected for clarity.
  • 0 in reply to Chuck Davenport
    Intellectual 535 points

    Hi Chuck,

    I have tested that the mibspiREG1->UERRSTAT register can be setted without enabling the mibspiREG1->ECCDIAG_CTRL register, seems like the ECCDIAG have no influence with the parity/ecc test.

    And I found the ECCDIAG is not enabled in the SafeTI diagnostic library, as shown below. So what is the function of ECCDIAG register?

     

     

  • 0 in reply to Geng Yue
    TI__Guru 59540 points
    Hello Yue,

    The ECCDIAG_EN key allows writes and reads of ECC bits to and from the ECC address space. If the diagnostic is not accessing the ECC address space, then it wouldn't be necessary to use the ECCDIAG_EN key field.