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RM48L952: Hercules RM48 – MibSPI Transmit data is incorrect at baudrate 7.5 Mhz

Kuerbis
Expert 4145 points
Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Hi Team,

 

We have a problem that MibSPI Transmit data is incorrect at baudrate 7.5 Mhz. It seems that data is 1bit sheft.

There is no issue at t baudrate 3.75 Mhz. is there any frequency limitation?

Do you have any idea on this issue?

 

If MibBSP5’s TX buffer is empty, How to behave during this transfer?

 

Expected data : 3c 04 10 00 40 00 00 …

7.5MHｚ"MasterRx : 3C 02 08 00 20 00 00 …

 

Peripheral : MIBSPI5 as Slave

Polarity : 0

Phase : 0

CSHOLD : 1 ( We don’t use CS but set 1 due to Errata MIBSPI#110)

SPICLK : INPUR from Master which is other MCU.　　

 

HALCoGen configuration

In case of as below. The data is some times shifted.

Polarity : 1

Phase : 0

 

Expected data : FE FE FE FE FE FE FE FE…

7.5MHｚ"MasterRx : FE 7F 7E 7E 7F 7E 7E 7F …

3.5Mhz is no issue.

 

Would you please investigate it?

Thanks and Best regards,

Kuerbis

  • 0
    TI__Guru 59540 points
    Hello Kuerbus,

    This is, most likely, going to be very difficult to reproduce as it is probably more system related. i.e., it is probably related to the sample points and slew of the SPI signals. Do you have a screen capture of one of these messages that have been shifted? Also, I see that each 8 byte message has the first byte correct and subsequent bytes are shifted. Is it the first byte of every 8 bytes that is correct with subsequent bytes shifted? If you send 16 bytes in a row, will only the first byte be correct and the 15 follow-on bytes shifted or every 8th byte is still correct?

    Note, if the slave receives a message and the TX buffer is empty, it will send what ever is in the shift buffer which is, most likely, to be whatever was received last.
  • 0
    Intellectual 740 points
    Hello there,

    I had a similar problem, increasing the delay "chip select to active transmit data" in halcogen fixed it.

    Kind regards,
    Karel