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CCS/TM4C129ENCPDT: TM4C129ENCPDT

Mark Brooks
Prodigy 110 points
Part Number: TM4C129ENCPDT

Tool/software: Code Composer Studio

I am developing with the TM4C129ENCPDTI3 under Code Composer.  I have become aware that there are several fware issues that are no longer managed by this processor under CCS the way they were in the past and so the available blogs are no longer valid.

I have UART rxd and GPIO inputs that I need to run under interrupt.  I am having a lot of trouble finding the 'current' method of taking my UART rxd and inputs away from task driven and allocating to ISRs.  Can someone please offer me the correct approach and some simple sample code.  Thanks

  • 0
    Guru 13040 points

    Hello Mark,

    Your statement is a bit confusing in regard to what is "in the past", and which available blogs are these...

    Do you know how to generate ANY interrupt at all?

    Go to ti.com/tivaware, and download the whole Tivaware driver library. There are lots updated of examples there. Inside the /docs folder, there is a big .pdf manual (the one ~4Mb) with detailed instructions of all functions you need to get your hardware working. And there are examples there which will help you reach your goal faster.

    Just as a guideline: CCS is now at 7.1, and Tivaware is ~2.1.4.

    Specifically about the UART interrupts, basically the checklist is:

    1. Enable GPIO ports where you have your pins
    2. Configure those pins as uart
    3. Enable uart peripheral
    4. Configure uart settings
    5. Enable uart interrupt and configure interrupt triggers
    6. Enable system interrupt for uart
    7. Enable general system interrupt
    8. Register the uart interrupt function in your startup file.
    9. Inside the interrupt service routine, check the interrupt cause, clear it, copy the FIFO buffer to your own buffer, set a flag to deal with incoming bytes later and get out of the ISR

    That is pretty much the recipe for interrupts for most peripherals.

    Regards

    Bruno