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Protection circuit for ESD/EMC immunity on TMS470MF06607

Hiroshi Kimizuka
Expert 4400 points
Other Parts Discussed in Thread: TMS470MF06607
I got an inquiry about the protection circuit to be attached on GPIO, CAN, nRST pins of TMS470MF06607 from my customer.
In order to enhance the immunity on ESD/EMC, could you please show the example circuit ?
 
Thanks in advance and Best Regards,
KIMIZUKA
  • 0
    TI__Genius 13810 points

    Kimizuka,

    For reset pin: (user can no-pop the cap/res for nRST, cap for the nPORRST at the beginning, and assemble them if the ECU fails ESD/immunity test).

     

    For TEST and ENZ pin (Please do not rely on the internal pull down):

    CAN: No protection is needed in the path from MCU to CAN transceiver. If this trace is long (>5cm), please consider reserve the footprint of a SMT capacitor to ground (in the driver end). This capacitor can slow down the edge and mitigate the emission in case it turns to a problem. In the transceiver side, usually, there are a TVS diode and a high voltage capacitor (around 100pF) together for EMC/ESD protection. They should placed as close to the connector as possible. The characteristic of the TVS diode should refer to their customer’s requirement for ESD.

     

    GPIO pins: if they served as external interrupt purpose, a low pass filter is needed in front of the pin. If they go the connector, please consider the ESD protection. Depending to the requirement, it could be a resistor + a high voltage capacitor, or a TVS diode + a high voltage capacitor.

     Regards,

    Haixiao

  • 0 in reply to Haixiao Weng
    Prodigy 10 points

    Haixiao,

    I took you advice and used a 1nF cap placed near the nPORRST pin and it helped my ESD immunity. I am curious though, I tried a .1uF can in the same configuration but it did not help. Can you explain why this might be? I am using the 1K pull-up resistor. I don't however know what the internal circuitry of the nRST and nPORRST are inside the micro.

    Any help you could offer would be greatly appreciated. I am just curious now...can't figure out why .1uF wouldn't do....

    Thanks!

    Craig

  • 0 in reply to Craig Quick
    TI__Genius 13810 points

    I don't know exactly why 0.1uF does not help in your case. What is the type of this test, contact discharge or air-discharge? What is the schematic and layout of this pin? Is it possible to get the waveform on this pin during ESD test? Anyway, I don't recommend 0.1uF due to other reasons:

    1. The startup ramp (from 20% to 80%) of PORRST should be less than 10us. Therefore, a 0.1uF with a 1k resistor is not suitable.

    2. nRST sometimes is an output pin, 4mA IO, driving an 0.uF capacitor might cause damage on this pin after thousands of powercycling.

    The internal circuit:

    1. PORRST: input with 100uA pull down.

    2. nRST:  input with 100uA pull up or Open drain output (during normal operation, it is input but it is opendrain output when PORRST is low or reset occurs)

    Regards,

    Haixiao