Part Number: TM4C129ENCZAD
Other Parts Discussed in Thread: TM4C129ENCPDT
Tool/software: Code Composer Studio
Hi,
We have two boards, one is the TI TM4C129EXL with the tm4c129ENCPDT and a second custom board with the tm4c129ENCZAD.
Both boards have a CAT5 connector, and the custom board has the same signal path between the uC and the CAT5 port (per the schematic in the Tiva™ C Series TM4C1294 Connected LaunchPad Evaluation Kit User Guide, page 34), which includes the diode protection array, the Magnetics chip and the RC networks.
We started with the TI board and the tcpEcho example application included with the CCS (Ver 7.1) TIRTOS/Tivaware install, implementing 802.3 100Mb Ethernet. This works fine on the TI board.
The following DSO screen capture shows (from top to bottom) :
Ch1: RX+,
Math1: Ch1-Ch2,
Ch2: RX-
Ch3: TX+
Math2: Ch3-Ch4
Ch4: TX-
This shows clearly the expected mlt3 encoding (-V, 0, +V)
After some experimentation, we found that regardless of whether the uC is programmed with the NDK, (even with a fully erased program FLASH), these signals appear when the CAT5 cable from the local switch, or even directly to another PC is connected to the TI board.
Needless to say, we can ping this board's Ethernet and move data back and forth from a host PC.
We ported the tcpEcho application over to the custom board, re-targeting the tcpEcho to the tm4c129ENCZAD.
However, when we run that app, or otherwise have the Ethernet cable connected, there are no signals. Just some noise. This is the case for all 4 of the RX/TX signals, probed at the diode chip, and at the input the magnetics chip. We tried two different custom boards and the behavior is the same. (I tried to upload a DSO capture of what we see but was denied. Will try in a follow-up post after this).
We have carefully checked with ohm meter the signal paths (on a blank and populated board) and the paths from pad to pad, starting at the pull-up R's (near the corresponding uC pins that connect RX/TX), to the input of the magnetics chip, from the magnetics output to the diode chip input, from the diode chip output to the CAT4 pins. All checks ok.
What we would like to ask at this point:
-Is it correct to assume the Physical Layer in these two chips are identical, at least as far as how they respond to the 802.3 signaling?
-More specific, does the tm4c129ENCZAD chip on the custom board require some SW config to get any signaling at all, whereas the TI board does not?
-Is it correct that the Physical and Link layers are entirely in hardware, or is it only the PHY portion of the Physical layer that is in hardware (what I mean by in hardware, is the functionality is hard-wired vs software)?
-Is it correct the PHY is what generates (without driver/SW intervention) the outgoing 802.3 signaling?
-Finally, we are stumped on what to try/look at next. Any suggestions appreciated.
Thank you.
