Is there anything else running in the system? What version of TI-RTOS are you using? What do you mean by locks in USBHCDPipeRead? What are the values passed into USBHCDPipeRead?

Note: I'm moving your thread to the device forum. We are re-doing our forum layout a bit tomorrow and this will prep for it.

Version of TI--RTOS :   tivac 2_16_00_08

When  I execute  fwrite   so the  program locks  when I do pause in debug it  stops  inside   USBHCDPipeRead().

In order to  isolate the problem ,  we  do a  program that has only one task that   open a file ( fopen)  and write  some data(fwrite) and close (fclose).

This prorgam runs fine when heap is in the internal RAM ( no matter  if there are static  variables in external ram) ,  mas when I enable Global Heap in external ram 

the problem occurs.   In debug I could se that internal buffer of  file I/O   functions  ( fwrite(),fread(0) is  above   0x60000000 when   Global Heap in external ram, and above 0x20000000 otherwise,  I assume  it  uses  malloc to be created.

I  could see also  that FATFs driver   call  USBHMSCBlockWrite ( )   that calls  USBHSCSIWrite10 that  calls USBHSCSISendCommand that calls  USBHCDPipeWrite  ( in the same file of  USBHCDPipeRead)    that calls DMAUSBTransfer .

I guess if the problem is in  DMAUSBTransfer() and   if Tiva-c has some limitation with DMA to USB  with  address >  0x600000000?

0x60000000

USBHCDPipeRead(uint32_t ui32Pipe, uint8_t *pui8Data, uint32_t ui32Size)

uint32_t ui32Pipe = 0x19905440
uint8_t *pui8Data = 0x20010288
uint32_t ui32Size = 13

The program stop in that loop:

while(1)
{
//
// Check if the device stalled the request.
//
if(g_sUSBHCD.psUSBINPipes[ui32PipeIdx].iState == ePipeStalled)
{
//
// Zero out the size so that the caller knows that no data was
// read.
//
ui32Size = 0;

//
// There are also no remaining bytes to read.
//
ui32RemainingBytes = 0;

//
// If DMA is being used, then disable the channel.
//
if(bUseDMA == true)
{
USBLibDMAChannelDisable(
g_sUSBHCD.psDMAInstance,
g_sUSBHCD.psUSBINPipes[ui32PipeIdx].ui8DMAChannel);
}

//
// This is the actual endpoint number.
//
USBHCDClearFeature(
g_sUSBHCD.psUSBINPipes[ui32PipeIdx].psDevice->ui32Address,
ui32Pipe, USB_FEATURE_EP_HALT);

//
// If there was a stall, then no more data is coming so break
// out.
//
break;
}

//
// If any error event occurs then exit out of the loop.
//
if(g_sUSBHCD.ui32IntEvents & (INT_EVENT_DISCONNECT |
INT_EVENT_VBUS_ERR |
INT_EVENT_POWER_FAULT))
{
//
// Set the pipe state to error.
//
g_sUSBHCD.psUSBINPipes[ui32PipeIdx].iState = ePipeError;

//
// Needs to be set to exit out of large while loop.
//
ui32RemainingBytes = 0;

break;
}

//
// If data is ready then return it.
//
if(g_sUSBHCD.psUSBINPipes[ui32PipeIdx].iState == ePipeDataReady)
{
//
// If not using DMA then read the data from the USB. Otherwise
// the data will already be in the buffer.
//
if(bUseDMA == false)
{
//
// Compute bytes to transfer and set up transfer
//
ui32BytesRead =
ui32RemainingBytes > 64 ? 64 : ui32RemainingBytes;

//
// Acknowledge that the data was read from the endpoint.
//
MAP_USBHostEndpointDataAck(USB0_BASE, ui32Endpoint);
}

//
// Subtract the number of bytes read from the bytes remaining.
//
ui32RemainingBytes -= ui32BytesRead;

//
// If there were less than 64 bytes read, then this was a short
// packet and no more data will be returned.
//
if(ui32BytesRead < 64)
{
//
// Subtract off the bytes that were not received and exit
// the loop.
//
ui32Size = ui32Size - ui32RemainingBytes;
break;
}
else
{
//
// Move the buffer ahead to receive more data into the
// buffer.
//
pui8Data += 64;
}
break;
}
else if(g_sUSBHCD.psUSBINPipes[ui32PipeIdx].iState == ePipeError)
{
//
// An error occurred so stop this transaction and set the
// number of bytes to zero.
//
ui32Size = 0;
ui32RemainingBytes = 0;

break;
}
else if((g_sUSBHCD.psUSBINPipes[ui32PipeIdx].iState ==
ePipeReadDMAWait) &&
(USBLibDMAChannelStatus(g_sUSBHCD.psDMAInstance,
g_sUSBHCD.psUSBINPipes[ui32PipeIdx].ui8DMAChannel) &
USBLIBSTATUS_DMA_COMPLETE))
{
break;
}
}
}

the value of g_sUSBHCD.psUSBINPipes[ui32PipeIdx].iState is always ePipeReadDma so the programa never go out of the loop.

Thank you, Todd - (pardon) but does the chart (properly) note that "MCU Data Bus" cannot access SRAM?

Should that prove the case - might you describe, "why & how" data placed in SRAM - (appears) to be accessed by the MCU. (it is an MCU - chart lists CPU - which TM4C is not.)

That does seem a little strange. I'll ask one of the TM4C engineers about that.

Thank you - appreciated - they may wish to (correct) CPU as well. (rather rare for a CPU not to have vast, dedicated address/data lines and to have Flash & ROM memory...)

So often - under the "crush of rush" - data arrives via "Cut/Paste" - and is then difficult to edit. (suspect that explains "CPU" & "NO access of SRAM" - both (unlikely.))