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SPNA119 - SVC Stack Initialization

Jeff Stafford
Expert 4595 points

In the application report "Recommended Initializations for TMS570 Microcontrollers" (SPNA119) the following code is listed for initializing the SVC stack:

ldr sp, [pc]

 mov pc, pc

 .word 0x08001300

The start address is software application dependent

Referring to the "mov pc, pc" instruction, does this instruction rely on the fact that the R4 program counter is already pointing to the next instruction when the operands are being fetch?  For this example PC would be pointing to ".word 0x08001300 " during the operand fetch of the "mov  pc, pc" instruction execution.  Is that correct?

Thanks, Jeff

  • 0
    TI__Mastermind 22375 points

    Jeff,

     

    When the CPU execute an instruction, it is already fetching 2 instructions head.

    In this example we have:

    1]   ldr sp, [pc]              pc is pointing to line 3, so it's reading 0x08001300 and store to sp

     2]  mov pc, pc              pc is pointing to line 4, address of first nop. CPU will jump to line 4 and continues in sequence.

    3]   .word 0x08001300 this line is not executed (litteral pool) it's not a valid instruction.

    4]  nop

    5]  nop

     

    Regards,

    Jean-Marc