Hi,
we have a couple questions on the below errata
[] Does "normal" mean Normal Mode as described in TRM 17.2.6?
[] I cannot find specifics of the CPU's Memory Protection Unit. There is only a short description in 17.2.14.2 about strongly-ordered and device type. Could you point me to the right place for what that means in terms of MPU and where the MPU is documented?
EMIF#4 Write to external asynchronous memory configured as “normal” causes extra WE
pulses
Severity 3-Medium
Expected Behavior The number of WE pulses should match the correct number of writes required by the
size of the data being written and the memory width configuration of the EMIF. For
example, a 32-bit data written to a 16-bit wide memory should cause two write pulses.
Issue One additional WE pulse is observed on the EMIF outputs. The byte enable signals
(EMIF_nDQM) are not asserted for the extra write pulse. For example, the EMIF_nWE
signal is asserted three times for a 32-bit write over a 16-bit interface.
Condition 1. MPU configuration for external asynchronous memory is normal.
2. Write to external asynchronous memory.
Implication(s) An additional write could be performed if the external memory or FPGA does not use the
byte-enable signals to actually perform the write. This could cause incorrect data written
to external memory.
Workaround(s) External asynchronous memory must be configured to be "device" type or "stronglyordered"
type using the CPU's MPU.
Thanks,
--Gunter
