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TMS570LC4357: Feature/security Summary

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

I am attempting to put together a competitive feature summary for a customer inquiry.  I have answered what I can, but want to have expert validate that I have not missed anything obvious.

Customer question   :   Answer

Physical Isolation of Power domains :   Yes, but need clarification on meaning of physical isolation.  All domains have transistor/gates that traverse power domain boundaries.

Temperature monitoring: Yes, 3 on die sensors.

Reset Monitoring: External power monitor required. (Reset source captured in registers)  Internal voltage monitor can initiate reset.

Redundant Boot/Safety/Error reporting mechanism:BIST (CPU,RAM,HET), Error Signal Pin, Voltage & Clock monitoring, PLL slip detection, watchdog, ECC (FLASH, RAM, Cache, Most peripheral memories)

Security measure to prevent reverse engineering (please list all): 128bit JTAG security. User & Privilege mode.

Thanks,

Wade

  • Wade VonBergen said:

    Part Number: TMS570LC4357

    I am attempting to put together a competitive feature summary for a customer inquiry.  I have answered what I can, but want to have expert validate that I have not missed anything obvious.

    Customer question   :   Answer

    Physical Isolation of Power domains :   Yes, but need clarification on meaning of physical isolation.  All domains have transistor/gates that traverse power domain boundaries.

    Temperature monitoring: Yes, 3 on die sensors.

    Reset Monitoring: External power monitor required. (Reset source captured in registers)  Internal voltage monitor can initiate reset.

    CWD-> has the same nRST feature for monitoring of reset status by an external component as well as the ability to assert a warm/soft reset externally.

    Redundant Boot/Safety/Error reporting mechanism:BIST (CPU,RAM,HET), Error Signal Pin, Voltage & Clock monitoring, PLL slip detection, watchdog, ECC (FLASH, RAM, Cache, Most peripheral memories), Lockstep Cortex-R5F CPUs, ECC on interconnect, very high diagnostic coverage across all IP on the device, ...

     

    CWD: Safety - IEC61508 SIL3 and ISO26262 ASILD certified, available compliance support packages (CSP), compiler qualification kit (CQK), SafeTI diagnostic Library, halcogen (GUI based driver generation tool), FMEDA for FIT rate customization for application specific use.

    Security measure to prevent reverse engineering (please list all): 128bit JTAG security. User & Privilege mode.

    Thanks,

    Wade