This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Compiler/TM4C123GH6PM: Program don´t fit into available memory

Part Number: TM4C123GH6PM
Other Parts Discussed in Thread: TMS570LC4357, RM57L843

Tool/software: TI C/C++ Compiler

I have a problem with the size of my code and I´m getting an error message:

Description    Resource    Path    Location    Type
<a href="processors.wiki.ti.com/.../10099"> program will not fit into available memory.  run placement with alignment fails for section ".bss" size 0x656b8 .  Available memory ranges:    TM4C123GH6PM.cmd    /UDMA_SSI_Project_2    line 55    C/C++ Problem

Description    Resource    Path    Location    Type
<a href="processors.wiki.ti.com/.../10099"> program will not fit into available memory.  run placement with alignment fails for section ".data" size 0x1f252 .  Available memory ranges:    TM4C123GH6PM.cmd    /UDMA_SSI_Project_2    line 54    C/C++ Problem


MEMORY
{
    FLASH (RX) : origin = 0x00000000, length = 0x00040000
    SRAM (RWX) : origin = 0x20000000, length = 0x00008000
}

/* Section allocation in memory */

SECTIONS
{
    .text   :   > FLASH
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
#endif
#endif
    .const  :   > FLASH
    .cinit  :   > FLASH
    .pinit  :   > FLASH
    .init_array : > FLASH

    .data   :   > SRAM
    .bss    :   > SRAM
    .sysmem :   > SRAM
    .stack  :   > SRAM
}

What can I do?

  • The TM4C123GH6PM has 32 Kb of SRAM. 

    The total size of the .bss and .data sections your program is 530.3 Kb which exceeds the size of the SRAM meaning the program won't fit into memory.

    Sadullah Zeyrek said:
    What can I do?

    Consider how to reduce the amount of SRAM the program uses, to fit into the available SRAM.

  • Where do you know that it is 530.3 KB? And how can I reduce the amount of SRAM the program uses?
  • Sadullah Zeyrek said:
    Where do you know that it is 530.3 KB?

    I added up the size of the .bss and .data sections reported in the linker error messages; .bss of size 0x656b8 bytes and .data of size of 0x1f252 bytes.

    The size of 530.3 KB excludes any memory used for the stack or heap.

    Sadullah Zeyrek said:
    And how can I reduce the amount of SRAM the program uses?

    Without seeing the code can't make any specific recommendations, other than to reduce the size of variables with static storage allocation (global variables).

    If it is not possible to reduce the amount of SRAM the program uses, you may need to select a different micro controller with more SRAM.

  • Unless poster's code was entirely, "imported" (yielding those errors immediately) should not such "error alerts" have occurred far earlier - during the program's creation? (as most self-developed programs "expand" in a somewhat regular process - sure to "trigger alarms" - when they, "Cross MCU capacity thresholds!)

    As an alternative - might some programming error have, "Unleashed a torrent of (unwanted) SRAM writes" - plunging poster into this dilemma?   Is the linker able to detect such a condition - prior to the program's "run?"    (I doubt this - yet it seems useful to introduce this possibility...)

    Chester wrote, "Reduce the "size" of variables w/static storage allocation" might the "number" of such variables have been intended?

    I cannot imagine any "reasonable" poster program requiring this amount of SRAM (~530KB) - thus "move" to a larger SRAM part may "mask" - rather than "resolve" - poster's issue...

  • Thank you for your answers, Chester Gillon!

    Chester Gillon said:
    If it is not possible to reduce the amount of SRAM the program uses, you may need to select a different micro controller with more SRAM.

    I read somewhere, that you can extend the SRAM up to 500 MB.

  • Sadullah Zeyrek said:
    I read somewhere, that you can extend the SRAM up to 500 MB.

    The TMC123 devices don't have an external memory interface, and so the SRAM can't be extended.

    The TMC129 devices do have the EPI interface which allows external memory to be used. The EPI interfaces supports SDRAM up-to 512 Mbits. There is a TI reference design for interfacing a 512 Mbit SDRAM - see Interfacing SDRAM Memory on High Performance Microcontrollers. Not sure if there are any development boards fitted with a 512 Mbit SDRAM.

    As for micro-controllers with more on-chip SRAM the Hercules ARM Cortex-R5 TMS570LC4357 and RM57L843 devices have 512 Kbytes of RAM, for which Launchpads are available.

  • Still unanswered - and possibly of greater usefulness & interest to (others) here - how was such a program developed - when it exceeded the MCU's SRAM capacity by >16x?    (i.e. 542,968 / 32768)

    Again - unless "imported" - MCU capacity errors should have been flagged "500KB of SRAM" - earlier!     (BTW - the sum of those 2 Hex Values (0x656b8 & 0x1f252) is "0x8490A" - in decimal that's 542,986 - which VASTLY Exceeds SRAM capacity!)

    Something here is "missing" - or suppressed - it is surprising that (thus far) there appears "so little" interest...