Part Number: TM4C129ENCPDT
Hi
I am acquiring the data from 8 analog inputs, using to sequencers (Sequence Number 1), using the 2 ADCs of the TM4C MCU. I know that both ADC can read simultaneously but the sequence means a delay when reading two analog inputs with the same ADC, how can i know what is the value of this delay if I am using a timer to control de acquisition? The sampling frequency (Fs) is 200 KHz. Here is the ADC configuration of both ADCs:
void ADCconfigure(uint32_t sysclock ,uint32_t Fs)
{
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_ADC0);
ADCClockConfigSet(ADC0_BASE,ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 1);
ADCSequenceConfigure(ADC0_BASE, 1, ADC_TRIGGER_TIMER, 0);
ADCSequenceStepConfigure(ADC0_BASE, 1, 0, ADC_CTL_CH16/*PK0*/);
ADCSequenceStepConfigure(ADC0_BASE, 1, 1, ADC_CTL_CH17/*PK1*/);
ADCSequenceStepConfigure(ADC0_BASE, 1, 2, ADC_CTL_CH18/*PK2*/);
ADCSequenceStepConfigure(ADC0_BASE, 1, 3, ADC_CTL_CH19/*PK3*/ | ADC_CTL_END | ADC_CTL_IE);
ADCSequenceDMAEnable(ADC0_BASE, 1);
uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC1,
UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
UDMA_ATTR_HIGH_PRIORITY |
UDMA_ATTR_REQMASK);
uDMAChannelControlSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
UDMA_ARB_1);
uDMAChannelControlSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
UDMA_ARB_1);
/**/
uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_PRI_SELECT,
UDMA_MODE_PINGPONG,
(void *)(ADC0_BASE + ADC_O_SSFIFO1),
&g_pui8USBTxBuffer[index0], MEM_BUFFER_SIZE);
uDMAChannelTransferSet(UDMA_CHANNEL_ADC1 | UDMA_ALT_SELECT,
UDMA_MODE_PINGPONG,
(void *)(ADC0_BASE + ADC_O_SSFIFO1),
&g_pui8USBTxBuffer[index0], MEM_BUFFER_SIZE);
uDMAChannelEnable(UDMA_CHANNEL_ADC1);
ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS1);
IntEnable(INT_ADC0SS1);
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC1);
SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_ADC1);
ADCClockConfigSet(ADC1_BASE,ADC_CLOCK_SRC_PIOSC | ADC_CLOCK_RATE_FULL, 1);
ADCSequenceConfigure(ADC1_BASE, 1, ADC_TRIGGER_TIMER, 0);
ADCSequenceStepConfigure(ADC1_BASE, 1, 0, ADC_CTL_CH0/*PE3*/);
ADCSequenceStepConfigure(ADC1_BASE, 1, 1, ADC_CTL_CH1/*PE2*/);
ADCSequenceStepConfigure(ADC1_BASE, 1, 2, ADC_CTL_CH2/*PE1*/);
ADCSequenceStepConfigure(ADC1_BASE, 1, 3, ADC_CTL_CH3/*PE0*/ | ADC_CTL_END | ADC_CTL_IE);
ADCPhaseDelaySet(ADC1_BASE, ADC_PHASE_0);
ADCSequenceDMAEnable(ADC1_BASE, 1);
uDMAChannelAttributeDisable(UDMA_CH25_ADC1_1,
UDMA_ATTR_ALTSELECT | UDMA_ATTR_USEBURST |
UDMA_ATTR_HIGH_PRIORITY |
UDMA_ATTR_REQMASK);
uDMAChannelControlSet(UDMA_CH25_ADC1_1 | UDMA_PRI_SELECT,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
UDMA_ARB_8);
uDMAChannelControlSet(UDMA_CH25_ADC1_1 | UDMA_ALT_SELECT,
UDMA_SIZE_16 | UDMA_SRC_INC_NONE | UDMA_DST_INC_16 |
UDMA_ARB_8);
/**/
uDMAChannelTransferSet(UDMA_CH25_ADC1_1 | UDMA_PRI_SELECT,
UDMA_MODE_PINGPONG,
(void *)(ADC1_BASE + ADC_O_SSFIFO1),
&g_pui8USBTxBuffer[index1], MEM_BUFFER_SIZE);
uDMAChannelTransferSet(UDMA_CH25_ADC1_1 | UDMA_ALT_SELECT,
UDMA_MODE_PINGPONG,
(void *)(ADC1_BASE + ADC_O_SSFIFO1),
&g_pui8USBTxBuffer[index1], MEM_BUFFER_SIZE);
uDMAChannelAssign(UDMA_CH25_ADC1_1);
uDMAChannelEnable(UDMA_CH25_ADC1_1);
ADCIntEnableEx(ADC1_BASE, ADC_INT_DMA_SS1);
IntEnable(INT_ADC1SS1);
//-----------------------------------------------//
SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
TimerConfigure(TIMER0_BASE, TIMER_CFG_A_PERIODIC);
TimerLoadSet(TIMER0_BASE, TIMER_A, sysclock/(Fs));
TimerControlTrigger(TIMER0_BASE, TIMER_A, true);
}
//--------------------------------------------------------------------
Thanks in advance