EK-TM4C123GXL: SSI Interrupt on SSI_TXEOT (End of Transmission)

Hello, im would like to control an APA102C Led Strip with my EK-TM4C123GXL.

So i would like to setup SSI0 as Master with its DATA Transmit and Clock Pins and use interrupts (without µDMA) so there is no busy waiting and between the interrupts there is time for the core to do other stuff. I would like to setup the interrupt to only appear on SSI_TXEOT Flag so if the fifo is empty and the last bit from the transmitt buffer is send, this interrupt would appear, then i load the fifo with as much data as possible (full 8 * 16bit) so the transmitt process would take as much time as possible to have free time for the core.

Question 1 is if the SSI_TXEOT Flag apears it means the sending stream has stopped, then it would take some time to load the fifo full and start sending again, there would be a little gap where no data is sent and if that is a problem for the leds as there were every time after the fifo has been sent empty a little gap. Is it maybe possible to setup the SSI, so that an interrupt comes after the fifo is empty but not the transmit buffer, so if the last data slot would be transfered to the fifo buffer for sending, there would be an interrupt and in the interrupthundler would be another fifo fillup while the last previous data slot would be sent, so there were no gap in the sending process.

Question 2 is that the interrupt does not show up on this Flag SSI_TXEOT. Ive tried with SSI_TXFF and it works in debugging, so i can execute code inside the ssi interrupthadler, but then i have only 4 fifo slots instead of 8 so the interrupt appears more frequently. Is this maybe this errata SSI#07 ? Is this solvable, it seems there is an workaround in this pdf but for my case too?

This is the initialiazion process for the SSI0:

void SSI0Init(void)
{

	SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
	SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

	
	GPIOPinConfigure(GPIO_PA2_SSI0CLK);
	GPIOPinConfigure(GPIO_PA5_SSI0TX);
	GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_2);

	SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
	                       SSI_MODE_MASTER, 1000000, 16);

	//SSIIntEnable(SSI0_BASE, SSI_TXFF);				//SSI_TXFF  --  TX FIFO half full or less
	SSIIntEnable(SSI0_BASE, SSI_TXEOT);					//SSI_TXEOT  --  Transmit FIFO is empty
	SSIEnable(SSI0_BASE);


}