RTOS/TM4C1292NCPDT: what is maximum number of interrupt handled with TI RTOS

Balasubramani C

Part Number: TM4C1292NCPDT

Tool/software: TI-RTOS

Hi,

My Controller is operating at 120 MHz. Before the product design i just want to make sure that tiva c controller will meet my requirement. one of the requirement is that the controller should capable of handling 1,00,000 hardware interrupt per second with TI RTOS environment.

Will TM4C1292NCPT controller capable of handling 1 lac interrupt per second? is there any way to measure the interrupt capability using EVM boards?

Regards

Bala

over 8 years ago

0 Charles Tsai over 8 years ago

TI__Guru**** 191206 points

Hi Bala,
I think this will be dependent on your application on what you do and how much time you spend in various interrupts. Your frequency of interrupts is at about 0.1MHz. With the processor running at 120MHz I don't think you will have a problem. But to confirm this I will suggest that you run some simple benchmark per your application use case.

0 Balasubramani C over 8 years ago in reply to Charles Tsai

Expert 1685 points

Thank you Charles.

Regards

Bala

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RTOS/TM4C1292NCPDT: what is maximum number of interrupt handled with TI RTOS