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TM4C129XNCZAD: I2C write data issue

Part Number: TM4C129XNCZAD
Other Parts Discussed in Thread: UCD90120A

I was developing I2C write function to write data to UCD90120A referring to thread

But I could not get the code working unless i add a delay as shown below

----*****_----

int
I2C_Single_Write(uint8_t ui8Command , uint8_t ui8Data)
{

  //  while(!I2CMasterBusy(I2C1_BASE));  // check for I2C master busy hence wait
    uint32_t error;

    I2CMasterSlaveAddrSet(I2C1_BASE, UCD_I2Caddr , false);// ucd addr slave
    I2CMasterDataPut(I2C1_BASE, ui8Command); // put Command to I2C1
    I2CMasterControl(I2C1_BASE, I2C_MASTER_CMD_BURST_SEND_START); // Send
    SysCtlDelay(1);
    while(I2CMasterBusy(I2C1_BASE));  // check for I2C master busy hence wait


    I2CMasterDataPut(I2C1_BASE, ui8Data); // put data to I2C1
    I2CMasterControl(I2C1_BASE, I2C_MASTER_CMD_BURST_SEND_FINISH); // Send
    SysCtlDelay(1);
    while(I2CMasterBusy(I2C1_BASE));  // check for I2C master busy hence wait

    return 0;

}

---------

What could be the reason for this??

  • Hi Rakesh,
    Can you please explain if you don't add the SysCtlDelay(1) what will happen? Does it just fall through the while(I2CMasterBusy(I2C1_BASE)) statement? If this is the case, the only thing I can think of is that the I2C state machine has not yet transitioned to the state to set the busy flag by which time the CPU is polling the flag. What operating frequency is the SYSCLK and the I2C speed?

    Please also refer to the I2C app note which will be helpful www.ti.com/.../spma073.pdf.
  • Hi Charles,

    May I note that Vendor's Amit (your fellow) has presented a "back to back" (status check for "toggle") - which appears "required" due to the increased speed realized by the 129 class devices when w/in I2C.     (such should be searchable/findable here - via forum's search box...)

    This "back to back" (status toggle mechanism) eliminated the need for (another) delay...

  • Hi Charles,

    The problem becomes apparant  if i have to send more no of data bytes before "finish" byte....in this case

    1.) I add 1 delay for start command

    2.) I HAD to add 45 delay for continue bytes

    3.) I add 1 delay for finish byte...

  • Hi cb1,
    Super! I will search the relevant posts. Really glad that you and guys like Robert and others are around to give these valuable hints.
  • Hi Rakesh,
    I'm able to find one post answered by my colleague who suggested to replace:

    while( I2CMasterBusy(I2C8_BASE) );

    with

    while(!( I2CMasterBusy(I2C8_BASE)));

    while( I2CMasterBusy(I2C8_BASE) );

    e2e.ti.com/.../1250522

    Please give a try and replace the I2C8 with your I2C1.

    Thanks to cb1 for providing the hints.
  • Hi Charles,

    That's it - exactly!
    While unconventional - many have employed and - but for "very special circumstances" - this works well for 129 class MCUs. (NOT to be used w/123 class ones...)

    Poster should appreciate the simplicity gained by employing "just this back-to-back delay mechanism" - which saves him the time/effort of determining "different duration delays."

    I was hoping to, Get a "LIKE" (now banned) perhaps our poster can award a "Satisfied my Issue" green click...

  • Sure I will give you my "LIKE" if it is still there. Don't blame me. I didn't remove it. :-)
  • Charles,

    I surely KNEW that "you" were NOT the "guilty party."       Nor were you the one who "promoted" Blogs, Groups, Videos to their beach-front locations.    (so wasteful - so undeserved - so "hard to understand & accept!")

    Would it not be "reasonable" to employ the "Top of the Forum Page" to "Speed, Ease, Enhance" the location - and review - of (most) all vital Tech Data - related to the devices (MCUs here) bounded by that forum? 

    How can "forcing users AWAY" from the Forum - instead to Google - or Digikey   (where God forbid - client-users may encounter superior, competing devices) make ANY Sense?    

    Comfort & Convenience have long been proven to SELL - neither "leap out" (don't even crawl out) under the current forum design...

  • Hi cb1,
    Your suggestions well taken. There is some discussion going on to create some FAQ notes for the forum community. Still in the planning phase. I don't have a timeline yet.
  • Hi Charles,

    Charles Tsai said:
    some discussion going on to create some FAQ notes for the forum community

    Thank you - such would surely prove helpful.   (maybe - assumes forum users CAN FIND such notes!)

    That said - should not those "FAQ Notes" be, "Easily & Quickly Noted" which means they (or their links) are "embedded" right here - on the Forum page?     Forcing forum users AWAY from the forum - in "search" of obvious & necessary - "Forum Related Tech Docs" - proves SO HARD to justify and w/out discernible advantage...    (other than Krazy Making!)

  • Hi cb1,
    Yes, it is indeed the plan. Some FAQ links or sticky notes at the top of TM4C forum entry page.
  • Charles Tsai said:
    Some FAQ links or sticky notes at the top of TM4C forum entry page.

    Thanks Charles - may we note that "sticky notes" (authored by Amit) are "already" (very) close to the top of the forum page.     (thus - no "real" improvement in that regard)

    FAQ links are welcome - but (really) almost all related/useful/guiding MCU Tech Data should be, "Readily & Easily Notable & Linkable" - without requiring your client-users to, "Leave the Forum Page!"

    Your forum page should be seen as a, "Central Data, Info & Idea Repository" - for all tech things TM4C related.      (which increases forum use & value exponentially - which IS the point - is it not?)

  • Can you please explain if you don't add the SysCtlDelay(1) what will happen?

    In the line I could not observe the i2c transaction for finish byte.the transaction terminates with Ist 18 clocks. If i add a brk at SysCtlDelay then finish byte spills out...

    Does it just fall through the while(I2CMasterBusy(I2C1_BASE)) statement?

    How to test this ??

    What operating frequency is the SYSCLK and the I2C speed?

    SYSCLK is 120Mhz and I2C is at 400KHz

     do you suggest me to replace SysCtlDelay(1) with something like ?? this is what i could understand from another comment

    while(!I2CMasterBusy(I2C1_BASE));// check busy

    while(I2CMasterBusy(I2C1_BASE));// check master free

    if so then wont this affect reentrancy ??

     

  • In the doc spama073.pdf ... it refers to sample code examples ektm4c129_i2c_master_cpu_fifo, ektm4c129_i2c_master_udma_fifo etc....I could not find the said examples in Tivaware folder (TivaWare_C_Series-2.1.3.156) .... where to get sample codes utilizing said features??..
  • Hi,
    This is the post I was referring to add the back-2-back check for I2CMasterBusy.
    e2e.ti.com/.../1250522