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Clock Cycle Profiling

Lucas Wendling
Prodigy 150 points

I'm looking for a fairly simple method to count clock cycles that a particular block of code takes to execute on a TMS570.  I'm debugging through JTAG on the target (with a Spectrum Digital XDS510 emulator), however, the profiling options I've seen for CCS v4 don't seem to be enabled (unless I'm doing something incorrectly).  Do I need to be using a simulator for these options to be enabled?  I couldn't find a "cycle accurate simulator" for the 570 either. 

Any other suggestions for easily doing this?  I was hoping to avoid having to setup some sort of timer in code that increments every clock cycle.

  • 0
    TI__Prodigy 365 points

    Hi Lucas,

    I have forwarded your query to our expert team members, will get back to you asap.

    Regards

    Hari

  • 0
    TI__Prodigy 365 points

    Hi Lucas,

    You can use the Performance monitoring unit (PMU) in cortex-r4 based devices to count the number of cycles that a particular block of code takes to execute.

    About the PMU

    The PMU consists of three event counting registers, one cycle counting register and 12 CP15 registers, for controlling and interrogating the counters.

    Using the control registers, you can enable or disable each of the event counters individually, and read and reset the overflow flag for each counter. Any or all of the counters can be enabled to assert an interrupt request output, nPMUIRQ, on overflow.

    When the processor is in Debug halt state:

         - the PMU does not count events
         - events are not visible on the ETM interface
         - the Cycle CouNT (CCNT) register is halted.

    The Performance MoNitor Control (PMNC) Register controls the operation of the three count registers, and the CCNT Register.

        - DP bit : Disable CCNT when prohibited, that is, when non-invasive debug is not

                       enabled
               0 = Count is enabled in prohibited regions. This is the reset value.

               1 = Count is disabled in prohibited regions.

            - E bit : Enable:
                      0 = Disable all counters, including CCNT. This is the reset value.
                      1 = Enable all counters including CCNT.

    The Cycle CouNT (CCNT) Register counts clock cycles.

     

    For more information refer Chapter 6. Events and Performance Monitor in Cortex-R4 TRM.

     

    Find the attached example code, which illustrates the use PMU unit.


    7455.main.c

    1856.perf_monitor_r4.asm

     

    Let me know your observations

     

    Regards

    Hari