• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 30 subscribers
  • Views 1545 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM48L952: Resetting System Control Register (SCTLR) register at init

Pierre Haritchabalet
Prodigy 90 points
Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Hello,

I'm working on developing a bootloader on Hercurles HDK RM48L952:

  • The bootloader is the TI Bootloader Ethernet
  • The user application is based on Micrium OS uCOS-III. 

The initialization of the bootloader calls the service "_coreEnableIrqVicOffset_" to enable IRQ handling via VIC Controller. The initialization of the user application doesn't call the service "_coreEnableIrqVicOffset_", as this mode is not compatible with uCOS-III.

But when the user application is initialized (sys_startup.c generated by HALCoGen), the bit VE in the register System Control Register (SCTLR) is not reset to 0. So I have written a service "_coreDisableIrqVicOffset_" to force the reset of the bit.

I'm not sure it's the right way to do that. Is there any function, generated by HALCoGen, to reset this register ?

Best regards

Pierre