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TMS570LS3137: HET3 Use of DCC as Program Sequence Please tell me about Watchdog

user4777395
Intellectual 480 points
Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN

I am using TMS570LS3137.

HET3 Use of DCC as Program Sequence Please tell me about Watchdog

1. Does this have a problem with recognition using DCC function and monitoring abnormality of the clock being supplied to HET?


2. In order to use this function, is it necessary to change the microcode in addition to setting with HalCoGen?
3. Also, when setting HET to DCC with HalCoGen, what value should be put in "H2 HET 1 Pin 31 Freq in HMz"?

  • 0
    TI__Guru**** 197036 points

    Hello,

    The primary purpose of DCC module is to measure the frequency of a clock signal using a second known clock signal as a reference.

    The DCC contains two counters – counter0 and counter1, which are driven by two signals – clock0 and clock1. The application programs the seed values for both these counters. The application also configures the tolerance window time by configuring the valid counter for clock0. Counter0 and counter1 both start counting simultaneously once the DCC is enabled. When counter0 counts down to zero, this automatically triggers the count down of the tolerance window counter (valid0).

    If you use N2HET31 input as clock source for counter1 or use NeHET31 to generate a clock (PWM) and use PWM as the clock source for counter1, you need to write microcode to generate a PWM with defined period.

    In HALCoGen, the value you write to "N2HET Pin31 Freq in MHz" should be the PWM frequency on N2HET31, or the input signal frequency.

    The digital watchdog (DWD) is in RTI module. The DWD can be used to detect the runaway CPU and generate either reset or NMI.

  • 0 in reply to QJ Wang
    Intellectual 480 points

    Thanks QJ.
    In DCC1 Config
    PLL 1 and N 2 HET 1 _ 31 can be selected with Clock Source 1.
    Does this match with the recognition that DCC 1 can only monitor either DCC?

    Is there a guideline to choose Clock Source 1?

  • 0 in reply to user4777395
    TI__Guru**** 197036 points
    Hello,

    TMS570LS3137 has two DCC modules. Each DCC module contains two counters- counter0 and counter1. The 2 counters are driven by two signals - clock source #0 and clock source #1.

    There are 8 clock sources for clock source #1, you can use either of them. The DCC1 compare unit is to compare the counter value from DCC1 counter 0 and DCC1 counter 1.

    If you want to ensure that the PLL output maintains a fixed frequency relationship with the OSCIN (clock source #0), you can select PLL as clock source #1.
  • 0 in reply to QJ Wang
    Intellectual 480 points

    Hello QJ,

    Is there a guideline to choose clock source to be selected with DCC?

  • 0 in reply to user4777395
    TI__Guru**** 197036 points
    Hello,

    There is no guideline. The clock sources are listed in datasheet: Table 6-15, Table 6-16, Table 6-17, and table 6-18 on Page 69 of spns162c.

    1. counter needs 2 different clock sources as input
    2. one of the clock source is the known-good, or reference clock (for example, the OSCIN); the second clock source is the "clock under test" (for example, PLL, or N2HET1[31] input).

    The selection of the clock sources for counter0 and coutner1 is done by a combination of the KEY, CNT0 CLKSRC and CNT1 CLKSRC control fields of the CNT0CLKSRC and CNT1CLKSRC registers.