RE: TM4C123GH6PM: What to do with unused pins

Robert Adsett said:

You should have a pull-dn or pull-up resistor.

Robert,

Given for example a project with a TM4C1294NCPDT, which has 120 pins, and in which 28 GPIOS are not used. Do you really add 28 pull-ups or pull downs around your MCU???

Maybe configure the pin as input and the pad as WPD on initialization ain't a bad practice, but I fail to see the reason for populating 28 extra beasts around.

I'd add 28 capacitors if I had the room!

Bruno

Bruno Saraiva said:

Given for example a project with a TM4C1294NCPDT, which has 120 pins, and in which 28 GPIOS are not used. Do you really add 28 pull-ups or pull downs around your MCU???

Short answer: Yes

Slightly longer answer: Resistors are small (and if necessary installed on the back of the board). The smallest I've used are 0201s (almost look like pepper flakes on the board) but usually if space constrained I'll use resistor arrays for this task.

Even longer answer: It's worse than that. The '123 series errata (I don't know if this is the case for the '129 series but if you use it, check) has an edge rate restriction that basically requires adding capacitors on unused pins.

Bruno Saraiva said:

Maybe configure the pin as input and the pad as WPD on initialization ain't a bad practice, but I fail to see the reason for populating 28 extra beasts around.

I'd consider it bad practice. The weak pull-ups are essentially useless and leave your hardware at the whim of a basically untestable programming bug.

Bruno Saraiva said:

I'd add 28 capacitors if I had the room!

That's a design constraint. You must fit all the parts into your bag. If you cannot , then you need a bigger bag.

Robert

Robert,
As an example from TM4C1294NCPDT datasheet, Table 26-7 referes to Connections for Unused Signals. It states that all unused GPIO's can be left NC (acceptable practice), or connected to GND (preferred practice). There is no mention of PD resistor.
I could not find the errata you mentioned, neither for TM4C123 nor for 129. Found nothing on the #ELEC entries, nor #GPIO entries, let alone searching for "edge"... what is this "edge rate restriction" errata that you mean?
I like your bigger bag sentence - some customers believe that PCB's can be stretched, I guess!
Bruno

Bruno Saraiva said:

. It states that all unused GPIO's can be left NC (acceptable practice),

I know TI calls that acceptable. I don't consider it so, especially in light of the errata. Even without that I don't consider the internal pull-ups and anti-latch protection sufficient.

Bruno Saraiva said:

or connected to GND (preferred practice)

And this is just plain dangerous.

Bruno Saraiva said:

I could not find the errata you mentioned, neither for TM4C123 nor for 129. Found nothing on the #ELEC entries, nor #GPIO entries, let alone searching for "edge"... what is this "edge rate restriction" errata that you mean?

GPIO #10

Errata said:

A fast transition on any GPIO pin can switch on a low resistance path between the GPIO pin or the adjacent GPIO pins and ground potentially causing a high current draw.

Robert

Bruno Saraiva said:

the #ELEC entries, nor #GPIO entries,

Woo, just found your hyperlinks to the tags which means this should work

#Bookshelf 

Robert

I think this thread has moved into a more general "what do I do with unconnected pins" topic. I think this discussion is important so I may split the thread and rename the title to make it easier to find.

First, let me say that a single answer will not fit every situation. Also, past experiences with different parts will color our design decisions. My hope is that I can provide some more insight.

Historically, CMOS inputs that were not used were connected to something to avoid the input floating to an intermediate level. An input at an intermediate level consumes more current, and depending on the device and software can cause unwanted software side effects as its state changes back and forth. The internal pull resistors on the TM4C devices are strong enough to prevent intermediate levels on unconnected pins. As previously pointed out, they are not strong enough for pulling additional external circuitry (like I2C lines).

An additional reason for adding connections to unused pins is a concern for damage caused by static discharge. Finished products (other than development boards) should be designed such that the unused pins are not accessible to the end user. It should be in some sort of enclosure. Development boards cannot have terminations on "unused pins" as we don't know which pins the developer plans to use. (And we all use static mats and wrist straps when playing with out launchpads, right?)

Another consideration of unused pins is the ability to pickup a voltage induced by an electric or magnetic field. The  most likely culprit is near field magnetic noise caused by a fast change in current nearby. The voltage induced by a magnetic field is picked up in a loop antenna. In this case, an unused input with a resistor connected to power or ground has a much better loop antenna than one left unconnected.

I also want to comment on erratum GPIO#10.

This erratum comes from the fact that on the TM4C devices the ESD protection comes from not only voltage activated zener diodes, but also a circuit that reacts to the very fast change in voltage caused in an electric discharge. We don't want that circuit to turn on when your input signal is switching, but we do want it to turn on when an ESD event happens. Since there is no input signal on an unconnected pin, erratum GPIO#10 does not apply.

I am sure I have missed some of your thoughts or concerns so I invite additional comments or feedback. I really appreciate the discussions that get generated in this User's Group.

Bob,

Excellent move! Thank you very much for the "official" comments!!!

a = 0; while (a<1000){PushLike(); a++;}

While we are at it, I'll (NOT) split the subject, but ask something kind of related - regarding the board's landing pad:

With boards populated in production lines, using pick&place, the "usual" landing pads work just fine. Most of the times, during development, they work as well for skilled hand soldering. In this situation (and especially when replacing a fine-pitch MCU), however, pins that are NC and pins that span towards the inner area of the component suffer most.

Is there any record of projects routing small traces from NC pins to nearby "dead" vias, just in order to mechanically strengthen these? The thought occurred to me the other day, and this conversation reminded me.

Bruno

Bruno Saraiva said:

Is there any record of projects routing small traces from NC pins to nearby "dead" vias, just in order to mechanically strengthen these? The thought occurred to me the other day, and this conversation reminded it.

The usual way I've done/seen this done is to in addition to the pull up add either a somewhat larger unmasked via or a single pin header. This makes it easer to add probe wires and patches. In fact as a matter of course I route all unused pins to headers, they provide valuable debugging points.

Robert

Bruno Saraiva said:

nearby "dead" vias

BTW pull-up/dn resistor sizes can be comparable to via sizes

Robert

Your proactive, "Move & Re-Title" of (primarily, friend Robert's post) is noted & appreciated - thank you.

I will (mostly) vote along the same lines as Robert - I accept poster Bruno's concerns - yet "Reliability & Robustness" must trump, "Ease of assembly - and board size."    (ALWAYS!)      (just see what the "Cost of a return" (really) is!)

May I "make the case" for an "often occurring, tech reality?"     Clients (especially smart ones) almost always will seek, "One more function and/or one (or several) more GPIO!"     And - if we've left (unused) pins as "N/C" what then - are we to "tack solder to bare MCU pins?"    Instead - our approach is to ALWAYS provide, "slight exit traces" (w/tiny pull Rs) terminating in a via - so that these (past unused MCU pins) may be "harvested" - SAVING a BOARD SPIN!      (and the resulting "extra effort, cost and DELAY!")     May I note that, "Clients LOVE US" (really) for this, "Accommodation of their "brand new" NEED" - which arises (most always) after the design has been, "LOCKED DOWN!"

Real World intrusions MUST be accepted - change is guaranteed - small firm's "flexibility, anticipation (via experience) & resourcefulness" KEEP the DOORS OPEN!

Robert Adsett said:

BTW pull-up/dn resistor sizes can be comparable to via sizes

C'mon, let the bone go, my friend!!!

:)

We still don't dare going below 0603. There is a lot of small-quantity, plenty of development hand-soldered stuff around here, and we like being able to "see what we are doing".

Bob Crosby said:

I think this discussion is important so I may split the thread and rename the title to make it easier to find.

*Like*

Good call.

Bob Crosby said:

An input at an intermediate level consumes more current, and depending on the device and software can cause unwanted software side effects as its state changes back and forth.

Worse than that, it can cause latch-up in a high current mode destroying the device. Now modern micros do have protective circuitry to reduce that but it can still happen.

Bob Crosby said:

The internal pull resistors on the TM4C devices are strong enough to prevent intermediate levels on unconnected pins

It appears from discussions that these pull-ups are not only rather variable but in the 100k range or worse. I would not consider this adequate to the task in any but the most benign environments.

Bob Crosby said:

Since there is no input signal on an unconnected pin

No deliberate input signal. And that's an important difference, I think, especially in an industrial and many consumer environments. When we discussed this with TI as we were preparing a respin (and incorporating this fix into the respin) it was clear that pull-ups and downs would not be adequate to prevent this issue from occurring. In fact it's specifically on unused pins that this most becomes an issue, on used pins restraining the rise and fall time is considerably less of a problem.

Robert

I need another Like cb

Bruno Saraiva said:

We still don't dare going below 0603. There is a lot of small-quantity, plenty of development hand-soldered stuff around here, and we like being able to "see what we are doing".

0201s can be hand soldered. I've seen someone hand solder 0201s as flywire patches (no pads).

I can understand the trepidation though.

Resistor packs are easier to solder and don't take up much (if any) more room.

Robert

Robert, cb1,

I'm not easily convinced but you guys are getting me almost there!

As for the resistor packs... happy to add a layout for something like a 19-array SOMC200110K0GEA.

Except that, when it comes to using one of the pins for "a new application", and then it is tied WPD with 18 neighbors, and the application requires no pulling... we hammer the stupid part with all our might!

May go with a whole bunch of 0603's grid aligned... Or they could even resemble a company logo if the space is there...

Bruno

Go for something like YC164-JR-074K7L instead,

• Isolated resistors
• I think these ones have scalloped pads which are a little easier to solder
• On the order of 0.02 each (.005 per resistor) even in small quantities.
• More flexible placement
• Similar are available from multiple manufacturers (not a small advantage)

With careful layout you can leave a trace to cut the pull-up connection from one side or the other if you need to but really I've not run into a situation where a pull-up was a big concern for an added circuit. The micro or output from the added circuitry can easily override so the only concern is the initialization period before all the I/O is set up and stable.

Robert

Robert Adsett said:

I need another Like cb

Your wish - my command.

*** LIKE ***   *** LIKE ***   *** LIKE ***   *** LIKE ***   *** LIKE ***

So much more effective than, "Ticking the past "LIKE" box!    (NOT - love "big-brother" thinking for us - "Do my Homework crüe trumps those (absorbing) much forum work-load..."

cb1_mobile said:

Robert Adsett

I need another Like cb

Your wish - my command.

Apparently my intent was ill-phrased but I'll take it.

Robert

Might that intent have been phrased as: "I need another (like) cb?" (the "Cap" in the original governed my choice...)

Are multiple cb1 a good thing? That's probably a question for crüe.

The intent was missing two words; "give you". This time the mistake worked in my favour. I think I'll just bask in unearned glory.

Robert

Re: "Are multiple ... a good thing?         So - you prefer (more) "Do my homework crüe?"

Or (more) posts titled, "TM4C129xyz : TM4C129xyz"        (thank God for the forum [LIKE-Less] upgrade.)

Crack staff (almost awake now - apres "le petit déjeuner") really LIKE the NEW, LESS PASSIVE, More Aggressive Robert...    (we all "loved that recent Tag - so beyond the "enfeebled/lifeless existing!")