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RM57L843: F021 Flash Port A and B correspond to BANK0/1 and BANK7 respectively?

Part Number: RM57L843

From the block figure I can see the F021 Flash has 2 ports linked to the Interconnect System.

According to the TRM, the 2 ports seem that they can be used simultaneously, and even when BANK0 is reading, the BANK7 can be programmed.

So I am guessing that F021 Flash Port A and B correspond to BANK0/1 and BANK7 respectively, am I correct?

  • Hello Candoferiskii,

    The purpose of the two parallel ports is to allow parallel access through the interconnect switch. i.e., when the CPU is accessing the Flash Bank0 using one of the ports, another master can access another bank using the second port B. The ports are not necessarily tied to a specific bank and the CPU and DMA can access any of the banks using either port.

    In regard to programming of bank7, the primary requirement is that you don't execute from the same bank you are programming. Since Bank7 is non-executable, this doesn't come into play. The 2 ports enable the opportunity for the DMA to access which ever bank isn't being used in the programming task while programming is ongoing. i.e., if FEE routines are located in Bank1 and A FEE programming task is under way, the DMA can then access Bank 0 without impacting the programming task happening on Bank 7.
  • Thank you for the reply.

    In your final example, the CPU is executing FEE routines which are located in BANK1 and programming BANK7. The DMA is also able to access both the BANK0 and BANK1 at this time, am I right?

  • Hello Canfoderiskii,

    No, even with the two parallel ports, two masters cannot access the same bank at the same time so if CPU is executing from Bank1 at the same time as DMA is accessing it, then there could be some arbitration delays/collisions in the interconnect.
  • I get it. Thank you.