This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RTOS/TM4C1292NCPDT: SPI - uDMA operation clarifiaction

Part Number: TM4C1292NCPDT


Tool/software: TI-RTOS

Hi,

I want to configure SPI in Master full duplex mode and trying to use uDMA for both Receive/Transmit the data simultaneously from/to internal memory to/from spi interface with same clock. in these case please clarify the below questions.

1. Will uDMA work simultaneously? suppose if spi master provides 32 clock, is it possible to tx 32 bits and rx 32 simultaneously?

2. I believe that single uDMA is shared across the peripherals, if so how dma transmit and receive data simultaneously?

3. If DMA is configured in ping -pong mode for both tx & rx, is there any clock delay between rx data and tx data?

Regards

Bala

  • The SSI (SPI) can transmit and receive data simultaneously. It transfers data serially. You can use the uDMA for both transmit and receive. You use two channels. The SSI has FIFOs for both transmit and receive. The SSI transfers data simultaneously, one bit at a time. The uDMA channels are not simultaneous, but they transfer data up to 16 bits at a time and are much faster. You setup the SPI and the DMA channels. The TX DMA starts filling the TX FIFO until it is full, or the number of items to be transferred has been loaded. The SPI shifts the TX data out and RX data in. As soon as a RX item is completely received (up to 16 bits) the RX DMA reads it from the RX FIFO. There is now another space in the TX FIFO. If the TX data has not already been completely loaded into the TX FIFO, the TX DMA channel loads another item. Since the SPI transfer is serial, there is always a delay between when the TX data starts going out and when the RX data finishes coming in.
  • Hi Bob,
    thanks for your detailed explanation.

    so i can use uDMA for SPI Tx & Rx simultaneously without missing any spi master clk. i.e. If SPI master is issues 1024 clock, then i will be able to transmit 1024 bits & receive 1024 bits without any delay using uDMA.

    Regards
    Bala
  • Yes, with SPI the transmit and receive happens simultaneously. This is true with or without the uDMA. Of course the slave device must have the data that it transmits to the master loaded into its transmit buffer before the transmission starts. This may or may not be true of the slave device you are using.

  • Hi Bob,
    Can you please confirm the same is applicable when SPI act as slave?

    Regards
    Bala
  • Yes, as either master or as slave, data is shifted out and shifted in at the same time.

  • Should it be noted that when employed as "Slave" - SPI data rate is much reduced?