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TMS570LC4357: GIOs - max current thru one pin // thru all pins at the same time

Marek Polak
Prodigy 40 points

Part Number: TMS570LC4357

Hallo,

I need to know, how much current can GIO port supply. I understtand, that in the datasheet are three kind of GIOs (2mA, 4ma, 8mA - SPNS195C).

But for example, I have one pin N17, i can connect it via multiplexer to EMIF (no GIO), N2HET (GIO - 2mA) or RTP (GIO - 8mA). Does it mean, that current flowing thru pin is determined by multiplexed signal from specific peripherals, not by buffer at specific pin?

And what is maximal current at all GIOs pin at the same time. I found this in SPNS195C at apage 55: Input clamp current maximum total +/-40 mA , does it mean, that maximum current thru all pins is 40 mA? Or which parametr says, how much current can be delivered to load via GIOs pins.

For example i have 20 leds, each need 6 mA. I can connect them only to 8mA signals, but can i turn them on all at the same time?

Thank you very much in advance.

  

  • 0
    Prodigy 40 points

    I thought this was a vital thing for a processor. And no one can tell me, how does it work? Or give me some URL, where I can find relevant information, i found this one: 

  • 0 in reply to Marek Polak
    TI__Guru 59540 points
    Hello Marek,

    First, I apologize for the delay in response. Our core team that supports the Hercules products is located in Sugar Land, Tx which is part of the Houston metropolitan area. As you have probably seen, this area has been hit by devastating rains and flooding from Hurricane Harvey and we are just now beginning to recover.

    In response to your general question regarding I/O output current, yes these can be specific to the chosen output function. In some cases, a programmable output buffer is utilized that can programmatically be changed dependent on the type of function selected for the pin.

    In regard to the more complex question about utilizing pins at or close to their maximum rating, it is best to make sure these are distributed around the ball pattern for the device. i.e., try to make sure they are not co-located if at all possible. It comes, really to power dissipation capability for those specific pins/area of the device. I recall that there were some guidelines on some TQFP devices to limit the current per side to no more than 45mAs total for all driven pins on a side. This was just a guideline and not a hard and fast rule but I do not know how this translates to the PBGA device but would recommend trying to distribute the pins around the device as much as possible and to be aggressive with your heat sinks and power dissipation.

    I will also forward this to a couple of our analog experts as well to get their inputs on any additional recommendations.
  • 0 in reply to Chuck Davenport
    Prodigy 40 points

    Hallo Chuck,

    I'm really sorry for what's happening in the Huston and I wish the fastest possible return to normal life. Thank you for your answer. I will look forward to answer of your analogue team.

    Kind regards

    Marek