• State TI Thinks Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 31 subscribers
  • Views 964 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM46L852: CPU STC Runtime : CPU register backups and restore

Vijayendra Deshpande56
Prodigy 205 points
Part Number: RM46L852
Other Parts Discussed in Thread: LAUNCHXL2-RM46,

Hello,

Can someone give a code for taking backup of CPU registers before starting the STC and restoring them once it is done.

I know which all registers needs to be backed up, but not sure of how to do it. I have seen an example of how to backup stackpointer but still I am little confused.

Thanks in advance.

  • 0
    TI__Guru 59540 points
    Hello Vijayendra,

    Please see these two posts regarding context save and restore and even the general argument for skipping of executing STC periodically vs. only running at start up. The primary concern for only executing at start up is the potential for latent faults in the CPUs but even with this potential, the CCM and lockstep architecture will continue to protect the safe operation of the system even in the event of a single point fault.

    The other threads that will be helpful are at these links:
    e2e.ti.com/.../391775
    e2e.ti.com/.../1374842

    This link also shows some code example for backing up the stack pointer: e2e.ti.com/.../122665

    In general, it is just a matter of copying the CPU registers into RAM locations before the STC executes LBIST and then after the completion of the test, reading back from the RAM location to the CPU register. One method to do this if it is to be done on a periodic basis is to define a struct type that maps to the CPU registers and copy into that struct before STC execution. The data in RAM will be protected by ECC for most of the time, but ECC will default to disabled after the CPU reset. This means you should provide some additional safety mechanism such as a CRC on the register data that can be validated prior to using the stored data.
  • 0 in reply to Chuck Davenport
    Prodigy 205 points
    Hello Chuck,

    I was able to backup and restore CPU core registers (r0-r14 and CPSR). I have few questions :
    a. is it necesary to backup and restore CP15 registers? if yes, can you please provide a sample code for the same?
    b. cp13? WVR? WSR? BVR? etc, I was not able to find these registers when I put ccs in debug and opened the Registers window from View->Registers. Can you please help with these?

    I am using Hercules Launchpad R46x Development kit - LaunchXL2-RM46. (RM46L852)