RINFOL and RINFOU to ALGO Register Mapping

Hello Sunil,

In your reply, you mentioned the following:

"The actual algorithm used to test the selected memory is independent of the RAM Group selection."

If the above statement is TRUE, then what is the purpose of ALGO Register setup?

Please help me understand how PBIST uses ALGO Register value?

Thank you.

Regards

Pashan

Pashan,

"The actual algorithm used to test the selected memory is independent of the RAM Group selection."

The above statement is not 100% accurate. The algorithms that you can run on a memory is certainly dependent on the type of memory. This association is defined in table 6-2 of the TRM. For example, the march13n_red algorithm can be run on the memories in RAM Group numbers 3, 4, 5, 6, 7, 8, and 14.

Also, this table allows you to identify the different algorithms that you can run on a given kind of memory. For example, you can run algorithms number 3, 5, 7, 9, 11 and 13 on Single Port RAMs. This mapping is also shown in the microcontroller datasheet in table 2-7, although the algorithm numbers are missing from the column headings.

The ALGO register allows you to select the particular algorithm that you want to run on the RAM group selected by the RINFOx register.

Regards,

Sunil

Hello Sunil,

Please answer below every question seprately.

------------------------------------------------------------------------

1> RINFOL = 0x04  -- DCAN1 -- Single Port  ------  ALGO=0x08  --- march13n_red -- Two Port.

Then PBIST will not run any Memory Test at all.

Right or wrong?

--------------------------------------------------------------------------

2> RINFOL = 0x04  -- DCAN1 -- Single Port  ------  ALGO=0x14  --- march13n_red + down1A_red -- Single Port.

Then PBIST will run only down1A_red and march13n_red algorithm for DCAN1 RAM only.   Nowhere else in the memory space PBIST will run any more test.

Right or wrong?

-------------------------------------------------------------------------

Thank you.

Regards

Pashan

Hello Pashan,

------------------------------------------------------------------------

1> RINFOL = 0x04  -- DCAN1 -- Single Port  ------  ALGO=0x08  --- march13n_red -- Two Port.

Then PBIST will not run any Memory Test at all.

Right or wrong?

>> You are right: the PBIST controller will not run any test on the DCAN1 RAM in this case. You must clear the bit 0 of the OVER register for the information from the RAMINFOx registers to actually take effect. Please refer to the example configurations shown in the TRM in section 6.8 on page 236.

Note that the RAMINFOx registers have all bits set by default, so that every single memory is selected for testing by default. This microcontroller does not have any RAM Groups selected by the RAMINFOU register, so it is not an issue.

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2> RINFOL = 0x04  -- DCAN1 -- Single Port  ------  ALGO=0x14  --- march13n_red + down1A_red -- Single Port.

Then PBIST will run only down1A_red and march13n_red algorithm for DCAN1 RAM only.   Nowhere else in the memory space PBIST will run any more test.

Right or wrong?

>> Bit 0 of the OVER register must be cleared for the information in the RAMINFOx registers to take effect. Once this bit is cleared, the above statement is correct: with RINFOL = 0x4 and ALGO = 0x14, the PBIST controller will run the march13n_red SP and down1A_red SP algorithms on the DCAN1 RAM.

-------------------------------------------------------------------------

Regards,

Sunil

Hello Sunil,

Thank you for the answer.

While reading the OVER Register Description, I found the following statement in TRM under OVER 1 and OVER 2 bit definitions of OVER Register:

"This bit should not be set during application self test."

What is the exact meaning of the above statement w.r.t. OVER1 and OVER2 bits?

Is it that end-user of the TMS570 must never set those two bits within their application under any circumstace?

Are those [OVER1 and OVER2] bits used for diagnostic purposes by TI only, like there is a pin called TEST Pin on the IC going to SYS Module to be used by TI only?

Please elaborate the usage of those bits by the end-user of the IC.

Thank you.

Regards

Pashan

Pashan,

The OVER1 and OVER2 bits must not be set by the end user's application code for any reason. These bits are dedicated for use by TI for enabling special memory testing modes.

Regards,

Sunil