• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 31 subscribers
  • Views 701 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM46L852: Task scheduler ISRs

Will Treharne
Intellectual 270 points
Part Number: RM46L852
Other Parts Discussed in Thread: HALCOGEN

Hello,

I am working on a real-time control project where we are using a simple task scheduler running off the RTI timer. The timer generates a 1ms tick and its ISR increments counters which are used to trigger 10ms, 100ms, and 1s tasks using the System Software Interrupts. The product will eventually be used in a safety critical application so we're trying to keep things simple and avoid using an RTOS which we'd have to certify.

The scheduler seemed to be working ok until I recently added our application software which runs in the 100ms task. This caused the microcontroller to crash shortly after returning from the application's main function which is called in the SSI ISR. After a bit of investigation, it appears the IRQ stack was overflowing and trashing the other stacks below it. I've adjusted the stack lengths in HALCoGen and it is not running happily again. However, I've ended up with an IRQ stack having to be as big as the user stack (0x800).

In the opinion of this forum's experts, is this an acceptable configuration, or is there a better way implement real time task ISRs? Eventually we'd like the higher rate tasks to be able to interrupt lower rate tasks. Is this likely to be difficult with our current arrangement?

Thanks in advance

  • 0
    TI__Guru**** 196816 points
    Hello Will,

    When you enter an interrupt routine, it will use the IRQ stack instead of the normal stack. I think it is an right way to increased the IRQ stack to solve the problem.
  • 0
    Expert 1995 points
    I am not a forum expert. Here are some topics you might want to consider.
    A safety device that operates on the IRQ level might not have access to some features of the hardware, or would demand a complex set of state and rule logic handlers.
    A safety device that operates on the IRQ level might have a default privilege level that would permit mis-coding or random failure to produce a bad result (no longer benefiting from access control as a technique to identify problem/faults before it results in an action).