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TM4C123GH6PM: timer pwm for delayed single shot pulse

Part Number: TM4C123GH6PM
Other Parts Discussed in Thread: TM4C123BH6ZRB

Hi

I'm using the TM4C123 Launchpad for a project.

Now, I tried to do a single delayed pulse on one of the MCUs I/O without CPU intervention. To do so, I have choosen a CCP pin and configured the assigned timer to work in PWM mode. This works perfectly fine for a normal PWM. However, if I configure the timers mode register (TAMR) to work in single shot mode instead of periodic mode, it only works if the prescaler isn't used. Further, I cannot drive high at match so that a delay would be possible unless I enable the invert option, what does not work since after the pulse the output remains high. I see that the timer PWM is probably not intended to be used in single shot mode, but how else are you doing a delayed pulse with a timer?  Or does it only work with the PWM module?

Thanks for any advice

Kind regards

Lothar

  • Can you not employ TWO Timers - one (exactly) as you have noted (set to PWM Mode) and the (added) one set to "one shot" and to "Interrupt upon completion (or time-out)?    Only upon the entry to your (added Timer's one-shot completion ISR) do you (then) enable your separate, PWM Mode Timer.    Note that this 2nd (added) timer provides the "delay" you seek...

    And - based upon PWM's period - you then "disable & reset" that (PWM Mode) Timer - which forces it to "one and only" one PWM impulse output."   (the disable & reset makes it, "ready" to respond (again) to the "next trigger" event.)

    Indeed - that's (some) monkey motion - yet may trigger better thoughts from yourself - or others - lurking this recent LIKE-less forum...

  • HI Lothar,

     It should works according to the datasheet (excerpt shown below). What pin action did you specify?

    TIMER_CFG_A_ACT_TOINTD - masks the timeout interrupt of timer A.

    TIMER_CFG_A_ACT_NONE - no additional action on timeout of timer A.

    TIMER_CFG_A_ACT_TOGGLE - toggle CCP on timeout of timer A.

    TIMER_CFG_A_ACT_SETTO - set CCP on timeout of timer A.

    TIMER_CFG_A_ACT_CLRTO - clear CCP on timeout of timer A.

    TIMER_CFG_A_ACT_SETTOGTO - set CCP immediately and then toggle it on timeout of

    timer A.

    TIMER_CFG_A_ACT_CLRTOGTO - clear CCP immediately and then toggle it on timeout

    of timer A.

    TIMER_CFG_A_ACT_SETCLRTO - set CCP immediately and then clear it on timeout of

    timer A.

    TIMER_CFG_A_ACT_CLRSETTO - clear CCP immediately and then set it on timeout of

    timer A.

    Timer Compare Action Mode

    The timer compare mode is an extension to the GPTM's existing one-shot and periodic modes. This

    mode can be used when an application requires a pin change state at some time in the future,

    regardless of the processor state. The compare mode does not operate when the PWM mode is

    active and is mutually exclusive to the PWM mode. The compare mode is enabled when the TAMR

    field is set to 0x1 or 0x2 (one-shot or periodic), the TnAMS bit is 0 (capture or compare mode) and

    the TCACT field is nonzero in the GPTM Timer n Mode (GPTMTnMR) register. Depending on the

    TCACT encoding, the timer can perform a set, clear or toggle on the corresponding CCPn pin when

    a timer match occurs. In 16-bit mode, the corresponding CCP pin can have an action applied, but

    when operating in 32-bit mode, the action can only be applied to the even CCP pin.

  • Thank you for the quick reply. Yes this would certainly be a solution but using to interrupts for a little delayed pulse is not the nice solution in my opinion. The timer would have a wait for trigger option so that only one interrupt would be necessary, but it is bugged according to the errata sheet when using PWM mode. Thank you very much.
    Kind regards.
    Lothar
  • Hi Charles
    Thanks for the advice. I will try it next week and click the verify button once I made it.
  • Hi Charles
    I looked a bit more thoroughly at the method you described but it seems that we might not have the same hardware. Neither the TM4C123GH6PM nor the TM4C123BH6ZRB (which I will use later) does have a TCACT field. However I found it in hw_timer.h and according to the defines it sould be bit[13:15] in TnMR register but thats probably legacy. Finally I found the revision history of the user guide which says that TCACT bit field has been removed in June 2014.
    Kind regards
    Lothar
  • Perhaps (now) the earlier suggested, "Solve via synthesis of your function" (via the combination of several, "simple functions") rises from the dead.

    Note too that (past) StellarisWare 9453 has proved extremely robust & stable - escapes the (many) mods/changes (not ALL yet listed) of vendor's newer offering...
  • Hi Lothar,
    Sorry, I must have referenced the TM4C129 datasheet instead of TM4C123 to give you the wrong info. Re-reading the TM4C123 datasheet I don't really find that the hardware in one-shot mode can automatically set (or invert) a pin upon match like the way you intend.

    cb1 has one good solution for you to consider. Let's us know if that will work.

    How precise is the delay needed to assert the pin? Can you upon a match interrupt set a GPIO pin and clear the GPIO pin when the timer time-out, both done in the ISR? The delay in this case will not be precise compared to cb1's solution.

  • How about you configure a uDMA transfer from a fixed location/value in memory into that GPIO's address?
    The transfer can be associated to the completion of a timer.
    In other words, timer runs out, triggers interrupt, which instead of calling IRS, triggers DMA from memory to memory. If (my) memory serves me, this transfer does not take more than 2 cycles (25ns under TM4C123 max clock).
    Such solution takes a few hours of comprehension, and possible just some 5 lines of coding...
    Bruno
  • The great complexity of µDMA far exceeds the (far simpler) use of: Two MCU Timers - each configured as "one-shot" - with the first Timer's expiration being detected (most likely via interrupt) and triggering the second Timer. (also a "one-shot")

    Note a "single sentence" (above) defines/describes implementation in entirety!    (proving simplicity)    How many sentences would newly proposed, "µDMA" method require?    (should you even know...)

    "Back to back" use of Timers is also likely to provide the accuracy and repeat (precision) poster seeks - same is (unlikely) via the "many different, variable timed, interlocked & multiple paths" - demanded by (the difficult to (even) explain/detail) µDMA.

    KISS rules - even for small tech - in Portugal...     Noted too: 

    Bruno Saraiva said:
    instead of calling IRS
    Complexity of "µDMA" is unlikely to "Call the U.S. Internal Revenue Service" (the REAL "IRS."

    No Gov't agencies require "alert" when "Two Simple Timers" (as long ago suggested/vendor approved) are employed!

  • Thanks for the many suggestions.

    Charles Tsai said:
    How precise is the delay needed to assert the pin?

    It actually doesn't has to be that precise, neither the delay nor the pulse duration. There will certainly be no problem doing the delayed pulse with timer interrupts. It's just that I prefer doing simple tasks like this one in hardware without bothering the core. And it nearly worked, by using the timer in PWM mode and configuring him as 1-shot timer. The only thing that is missing is a flag to move the high time to the end of the period, like that:
    ______                                                               ______
    |           |                         ---->                               |           |
    |           |___________          ___________|           |
    ^ sw trigger                         ^ sw trigger

    What I did is the approach cb1_mobil has suggested, doing the delay with a timer and triggering the pulse on timeout. This way, I do need only one interrupt instead of two. What has do be considered is, that the prescale register doesn't work when configuring the timer as 1-shot PWM, hence the pulse cannot exceed ~1ms when using a timer (not wide timer) @80Mhz.

    Bruno Saraiva said:
    How about you configure a uDMA transfer from a fixed location/value in memory into that GPIO's address?

    I really like doing excitation patterns with the DMA, reading a table somewhere in memory and moving it to the I/O registers, especially if many I/Os are used for the excitation, but in this case, it seems a bit overkill. Thanks anyway.

    Kind regards
    Lothar

  • Thank you, my friend - appreciated.

    There ARE multiple benefits to simplicity - so well memorialized w/in "KISS."    (KISS so strangely, mistakenly, "banned here" - as is LIKE.) 

    Now - while key clients limit my firm to "StellarisWare 9453" (due to its "known bug-free" & stable nature) - there ARE improvements/additions introduced via vendor's (horribly named) newer version.   (TIVO - I think)

    Do consider the function: TIMER_CFG_A_ACT_CLRSETTO - which claims: "clear CCP immediately and then set it on timeout of timer A"

    By my read - this enables a "Single Timer (Timer_A)" to (both) provide your initial delay (via its one-shot) function - and then AUTOMATICALLY drives "CCP HIGH" - JUST AS YOU DESIRE!

    Not revealed is "just how" you would "kill this CCP output!"     And I could not find an "extinguish Timer Output" API function by my scan.    Review of the Timer Registers should reveal one (or more) such method...