RM48L952: DMA channel chaining using a lower chained channel

Hello Westin,

I have discussed this with some colleagues and all of agree that during channel chaining, the chained transfer (i.e., channel 0 in your scenario) will not interrupt the initial transfer (channel 1 in your scenario) because the chained channel will not be triggered until after the first is done. This is the basic principle behind channel chaining in that it is serial and the completion of one DMA transfer then triggers the next and so on.

To your point about changing context while transferring elements, this would come into play if a higher priority channel were triggered while the lower priority channel is in the process of transferring. This context switch would be a result of the re-evaluation of arbitration which occurs after every 4th element. The key in this is the triggering of the higher priority transfer which would not occur in your the case of chaining channel 0 to the end of channel 1.