TMS570LC4357: CS_HOLD function in MibSPI slave operation

Daniel_EE

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

I am using TMS570LC43 launchpad as a slave device. My master device is another launchpad and works just fine. I am sending 8bytes using Mibspi with CS_HOLD selected. So CS stays low during entire 8bytes transfer.

But My slave device is not responding properly. It can send or receive the only first byte of every transfer. I noticed that If I uncheck CS_HOLD bit, then master assert and de-assert CS line during transfer. This seems to work OK for the slave. My slave can receive all the bytes from the master and also can send 8 bytes. But this required CS to be de-asserted after every byte transfer by the master.

I want to change this behavior. I want to send 8 bytes from the slave in a single shot.

over 8 years ago

0 Chuck Davenport over 8 years ago

TI__Guru 59540 points

Hi Daniel,

The key to this issue is how is the CS HOLD bit set in the slave device. Following is an excerpt from the device TRM>

0 Daniel_EE over 8 years ago in reply to Chuck Davenport

Intellectual 670 points

I tired to toggle this bit. This does't change the behavior.

I have attached my demo code. 6153.SPIMasterSlaveDemo.zip

0 Daniel_EE over 8 years ago in reply to Daniel_EE

Intellectual 670 points

I could not find the register, which sets the length of buffer in slave mode.

0 Daniel_EE over 8 years ago in reply to Chuck Davenport

Intellectual 670 points

Can you please help me out with this?

0 Chuck Davenport over 8 years ago in reply to Daniel_EE

TI__Guru 59540 points

Hi Daniel,

I am going to forward your post to one of our designers who was involved with the design of the MibSPI module to get his inputs to this issue. Once I hear back from him (I expect early next week), I will come back with more information. Sorry for the delays in getting a solution for you.

0 Daniel_EE over 8 years ago in reply to Chuck Davenport

Intellectual 670 points

Hi Chuck,

Did you get any update?

0 Chuck Davenport over 8 years ago in reply to Daniel_EE

TI__Guru 59540 points

Hi Daniel,

Sorry for the delay. I did check with our MibSPI expert. To be clear, the slave device is operating in MibSPI mode not standard spi mode correct?

Also, to clarify, your slave device is receiving only the first byte from the master with the subsequent shift of data out on the SOMI pin, correct? Do you have your transfer group setup and loaded with the data to be transmitted next? If you put a scope on the slave Rx pin, do you see the data being shifted out of the master to the slave but the slave is simply not "seeing" it?

I also want to clarify that you are sending 8 bytes TO the slave in order to get the 8 bytes sent back from the slave. The slave will only shift bits out when bits are received.

0 Daniel_EE over 8 years ago in reply to Chuck Davenport

Intellectual 670 points

Yes Chuck. You got it right. I am using MIBSPI1 as MibSPI module. From the master I see all the 8 bytes being transferred to slave device(Verified using scope). I see slave only able to read or send one byte.Next byte will be transferred only after master de-assert and assert the Chip select line. Slave requires de-assert of Chip select line from master in order to send all the 8 bytes in one transfer. I played with CS_Hold bit in slave configuration ,but it didn't change the behavior.

0 Chuck Davenport over 8 years ago in reply to Daniel_EE

TI__Guru 59540 points

Daniel,

To confirm, it is MibSPI1 in MibSPI mode in both master and slave devices? Do you configure the MibSPI RAM in the slave device in order to receive the multiple bytes? Also, is there a gap between Byte0, Byte1, Byte2, etc.

When the slave receives the first byte, what do you do with the received data by the slave? It has to be read in order to be ready for the next byte or it has to be setup with a receive buffer to which the data is transferred. Is his part of your setup?

0 Daniel_EE over 8 years ago in reply to Chuck Davenport

Intellectual 670 points

Yes, MIBSPI is configured in both Master and in Slave.

I configured Transmit group to transmit 8 bytes. I am assuming same will work for receiver as there was no setting for receiver mode in HALCOGEN.

I am using MIBSPI so I am sending all 8 bytes in once from master. I am expecting same behavior in slave also. after my receive buffer is full, I read all the bytes.

There is no delay in between individual bytes.

0 Chuck Davenport over 8 years ago in reply to Daniel_EE

TI__Guru 59540 points

Hi Daniel,

I again apologize for the delayed reply as I have been tied up in training for the past week and a half.

You will need to also configure the slave TG as well. The TG should correspond to the chosen chip select. i.e., if you are using CS0 then TG1, if CS1, then TG2, etc. I think this is the primary issue you are having since without the TG configured, you would simply be in normal SPI mode and not buffered mode of use. I believe the Transfer group configuration tabs in Halcogen apply regardless of whether you are configuring a master or slave so this should work for configuring your application.

0 Daniel_EE over 8 years ago in reply to Chuck Davenport

Intellectual 670 points

I am not sure If I missed to mention but I a configured the MIBSPI in salve mode. I also took care of CS for various CG and configured correctly.

0 Chuck Davenport over 8 years ago in reply to Daniel_EE

TI__Guru 59540 points

Thanks for the clarification, Daniel. Is your code still the same as the demo project you posted earlier or would an updated project be needed if I am going to have a look at it?

0 Daniel_EE over 8 years ago in reply to Chuck Davenport

Intellectual 670 points

Yes, It is same as before.

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TMS570LC4357: CS_HOLD function in MibSPI slave operation