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Could not find PBIST ROM Clock divider selection

Pashan
Intellectual 715 points


Hello,

In the spnz176a.pdf ERRATA for TMS570, I found item PBIST#3 PBIST Module Functionality Affected When VCLK Equals HCLK

There it is mentioned about PBIST ROM Divider Ratio setting to be done before PLLCTL1 setup.

Can you please help me to get the respectived Register Name within TRM for TMS570  related to the PBIST ROM Clock Divider Ratio setting?

Thank you.

Regards

Pashan

  • 0
    TI__Mastermind 49120 points

    Pashan,

    The PBIST ROM clock divider is configured using the ROM_DIV field of the Memory Self Test Global Control Register (MSTGCR) at address 0xFFFFFF58. This register is defined on page 107 of the TRM (page number 99 on a printed version).

    Also, please note the 100MHz PBIST execution speed limitation listed on page 15 of the TMS570LS2x data sheet (SPNS141C).

    Regards,

    Sunil