Hi,
While reading the "TMS570LC43x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual" (SPNU563, May 2014), I found the following errors:
1) Register RAMUERRADDR is mentioned at 3 places in chapter 8 "Level 2 RAM (L2RAMW) Module", but it does not exist.
2) In the same chapter, RAMERRSTATUS[DWDE]'s description talks about single-bit errors, but it should obviously be double-bit errors.
Now, there is something not clear in the L2RAMW documentation:
3) Does RAMCTRL[ECC DETECT EN]=5h disables both ECC errors detection and ECC codes generation? If not, is there a way to disable ECC codes generation? My objective is to write a bad ECC code in RAM in order to test the SECDED mechanism.
Thanks.