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TM4C1294KCPDT: Where to locate a ROMBL user guide & active GPIO module ports with disconnected pins

Genatco
Guru 55913 points
Part Number: TM4C1294KCPDT

Please advise where can the TM4C129x ROM boot loader user guide can be found or it assumed we use the serial boot loader user guide http://www.ti.com/lit/pdf/spma074 and TM4C123GXL launch pad to write to an erased flash memory?

TM4C1294 datasheet table 26.6 unused signals preferred practice column shows to ground unused GPIO pins (no footnotes) and text paragraph table comments the module clock should be disabled when module is unused, inputs are grounded.

What if all GPIO modules are sleep enabled with hibernation module disabled and GPIO pins are purposed for future expansion having resistor pads to ground near MCU pins. Can programmed GPIO pins be connected to ground via 0R if or when the pins are used as inputs to unused but configured peripherals?  Sounds plausible unused GPIO input pins can be pulled down but with 0R seems questionable in my mind.

Any thoughts?

  • 0
    TI__Guru*** 135355 points
    Hello BP101,

    I assume the link you tried to provide is also the source for Table 26.6? Or is that from the device datasheet? Either way, it looks like the link you provided is not functional for some reason. Can you please check which document you meant to link and provide that? I feel like I have an incomplete picture of your question currently.
  • 0 in reply to Ralph Jacobi
    Guru 55913 points
    Hi RJ,

    Table 26.6 in TM4c1294x datasheet and the link was not an online PDF but a download zip. I fixed the link above post but the site maintenance just started.
  • 0 in reply to Genatco
    TI__Guru*** 135355 points

    Hello BP101,

    Sorry, it didn't register to me when I first posted that you had two separate inquiries. I was trying to relate them together which as you might guess caused me a deal of confusion. Whoops. I'm mentally sorted out now though, so I'll tackle each question:

    There isn't a ROM Boot Loader guide, but I would recommend looking at the TivaWare Boot Loader guide for getting a better understanding of the various Boot Loader's: http://www.ti.com/lit/ug/spmu301d/spmu301d.pdf

    The ROM Boot Loader will be invoked automatically if the flash is erased, or it can be manually invoked at time of reset via GPIO based on the configuration of BOOTCFG.

    Once invoked, the ROM boot loader will look at all supported communication interfaces until one of the interfaces receives a valid signal, and then it will then use that interface for the update.

    If multiple interfaces were detected, there is a sequence in which it chooses which is USB > ENET > I2C > SSI > UART.

    For the GPIO question, having unused GPIO's configured as an input and pulled to ground would be fine. From my standpoint, I don't see why you couldn't use a 0 ohm for the connection you describe rather than just having the pin connect straight to ground, though I suspect other forum goers here would urge the use of something more substantial than a straight to ground or 0 ohm connection. If I recall right, Robert and/or Bruno had a discussion about TM4C unused pins recently, you might be able to find it via search if curious.

    Maybe you can shed some further light on why you feel the idea of using a 0 ohm would be questionable?

  • 0 in reply to Ralph Jacobi
    Guru 55913 points

    Hi Ralf,

    Sorry for delay being never seem to get email notice of your reply.

    Ralph Jacobi said:
    The ROM Boot Loader will be invoked automatically if the flash is erased, or it can be manually invoked at time of reset via GPIO based on the configuration of BOOTCFG

    I recall that might be the case and long ago added jumper plug header to PH3 pin on MCU but was curious of the ROMBL order (USB > ENET > I2C > SSI > UART) and checked serial BL guide has a similar path.

    Ralph Jacobi said:
    Maybe you can shed some further light on why you feel the idea of using a 0 ohm would be questionable?

    Well the text states the module clock source should be disabled if pins are grounded and module is not used  Yet the table column shows GND with no foot note of what makes grounding the pin acceptable when the module has been configured as GPIO input port or digital/analog peripheral inputs. Yet are disconnected expansion traces via open jumper & 0R GND at MCU pin. The table seems to contradict the text or issues no warning that grounding an unused GPIO pin of a clock enabled module will destroy it. 

    Table 26-6 states All unused GPIO's and the preferred practice column show (GND) assumes the module clock source has been disabled? 

  • 0 in reply to Genatco
    Guru 55913 points

    If a module is not used in a system, and its inputs are grounded, it is important that the clock to the module is never enabled by setting the corresponding bit in the RCGCx register.

    I now realize this warning is benign when it comes to GPIO input direction but it sure make it sound like the peripheral pin should never be grounded if the module clock is enabled. Parts of the module are in use for HW duties and other parts (same module) not presently in use. Yet the far buses are configured if later populated at the near bridge point next to MCU pins. 

    Added a few short trace TP's GPIO (not yet configured) but have a custom PCB trace to access the GPIO port as spare like a handy BP pin if purposed GPIO port pin ever fails. Those TP GPIO pins float and are less than 3mm to MCU.