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RM46L852: PBIST DONE interrupt

Part Number: RM46L852
Other Parts Discussed in Thread: HALCOGEN

Good morning,

During some tests on my aforementioned target (RM46L852), I observed that the PBIST DONE interrupt was triggered.

In RM46 TRM, I found that this interrupt is located at channel 85 of VIM controller. However I did not find any clue about the exact conditions that trigger this interrupt.
During my target start-up procedure I actually perform some PBIST that I enabled by Halcogen.
Is this interrupt only here to indicate that PBIST ended (successfully?)?

Where could I find details about this interrupt?

Thanks by advance,

Jules

  • Hi Jules,

    From what I was able to find in the TRM, this is related to data logging to indicate the completion of the PBIST algorithms ran from ROM inside the chip. Normally, I wouldn't expect this to be triggered in an application since data logging is usually related to production tests on the MCU so I need to look a bit further into this. Since HalCoGen usually doesn't support the safety diagnostics in the case of RM57, I am curious if this is really a test initiated in the Safety Diagnostic Library. If you can post your project that I can use to recreate the issue, it would be helpful in understanding this topic.
  • Hi Chuck,

    Thanks for your feedback.
    Actually, you might be right. I cannot ensure that this part of code has been generated by Halcogen; it might be based on an example provided among the SafeTI libraries files.

    In our project, we followed the instructions provided within the TI application note called  "Initialization of Hercules ARM Cortex R4F Microcontroller" to develop a bootloader.
    Basically, when the Hercules MCU starts-up, the _c_int00 routine is called and before launching the main() function, we perform the PBIT and initializations listed in the application note.

    Could this interrupt be generated because I ran some "wrong" PBIT? Would you know which SafeTI library function could lead to this kind of interrupt?

    I will internally check if I could provide you the startup file we have if needed.

    Thanks,

    Jules

  • Actually, I checked the source code of SafeTI library and I can see that the function called SL_SelfTest_PBIST update the DLR2 bit of DLR register (in PBIST_EXECUTE case statement). Thus as per the TRM I assume the PBIST DONE interrupt triggering is normal, isn't it?
  • Hello Jules,

    After the PBIST completes, the MSTDONE bit is set, and the PBIST_DONE interrupt bit is also set.
  • Shall I understand that this is normal behavior then?
    If yes, i can close this topic and verify your answer.
    Thanks.

    Jules

  • Hello Jules,

    Yes, it is normal to have PBIST_DONE set after the memory selftest completes successfully.